AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 933
AT91SAM9M10-CU
Manufacturer Part Number
AT91SAM9M10-CU
Description
IC MCU 16/32BIT ARM9 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM9M10-CU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
5
Number Of Timers
2 x 16 bit
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
Cpu Family
AT91
Device Core
ARM926EJ-S
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
64KB
# I/os (max)
160
Number Of Timers - General Purpose
7
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.1/1.95/3.6V
Operating Supply Voltage (min)
0.9/1.65/1.8/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9M10-CU
Manufacturer:
Atmel
Quantity:
996
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40.4
Table 40-1.
40.5
40.5.1
40.5.2
40.5.3
40.5.4
6355B–ATARM–21-Jun-10
Pin Name
VDDANA
TSADVREF
AD0X
AD1X
AD2Y
AD3Y
GPAD4 - GPAD7
TSADTRG
P
M
P
M
Signal Description
Product Dependencies
Power Management
Interrupt Sources
Analog Inputs
I/O Lines
TSADCC Pin Description
The TSADC controller is not continuously clocked. The programmer must first enable the
TSADC controller Clock in the Power Management Controller (PMC) before using the TSADC
controller. However, if the application does not require TSADC controller operations, the TSADC
controller clock can be stopped when not needed and be restarted later.
Configuring the TSADC controller does not require the TSADC controller clock to be enabled.
The TSADCC interrupt line is connected on one of the internal sources of the Advanced Inter-
rupt Controller. Using the TSADCC interrupt requires the AIC to be programmed first.
Table 40-2.
The analog input pins can be multiplexed with PIO lines. In this case, the assignment of the
TSADCC input is automatically done as soon as the corresponding channel is enabled by writing
the register TSADCC_CHER. By default, after reset, the PIO lines are configured as input with
its pull-up enabled and the TSADCC inputs are connected to the GND.
The pin TSADTRG may be shared with other peripheral functions through the PIO Controller. In
this case, the PIO Controller should be set accordingly to assign the pin TSADTRG to the
TSADCC function.
Table 40-3.
TSADCC
Instance
Instance
TSADCC
Peripheral IDs
I/O Lines
Description
Analog power supply
Reference voltage
Analog input channel 0 or Touch Screen Top channel
Analog input channel 1 or Touch Screen Bottom channel
Analog input channel 2 or Touch Screen Right channel
Analog input channel 3 or Touch Screen Left channel
General-purpose analog input channels 4 to 7
External trigger
20
ID
TSADTRG
Signal
I/O Line
PD28
AT91SAM9M10
Peripheral
A
933
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