AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 400
AT91SAM9M10-CU
Manufacturer Part Number
AT91SAM9M10-CU
Description
IC MCU 16/32BIT ARM9 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM9M10-CU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
5
Number Of Timers
2 x 16 bit
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
Cpu Family
AT91
Device Core
ARM926EJ-S
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
64KB
# I/os (max)
160
Number Of Timers - General Purpose
7
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.1/1.95/3.6V
Operating Supply Voltage (min)
0.9/1.65/1.8/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9M10-CU
Manufacturer:
Atmel
Quantity:
996
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28.5
Table 28-1.
28.6
28.6.1
28.6.2
400
Pin Name
MISO
MOSI
SPCK
NPCS1-NPCS3
NPCS0/NSS
Signal Description
Product Dependencies
AT91SAM9M10
I/O Lines
Power Management
Signal Description
The pins used for interfacing the compliant external devices may be multiplexed with PIO lines.
The programmer must first program the PIO controllers to assign the SPI pins to their peripheral
functions.
Table 28-2.
The SPI may be clocked through the Power Management Controller (PMC), thus the program-
mer must first configure the PMC to enable the SPI clock.
Pin Description
Master In Slave Out
Master Out Slave In
Serial Clock
Peripheral Chip Selects
Peripheral Chip Select/Slave Select
Instance
SPI0
SPI0
SPI0
SPI0
SPI0
SPI0
SPI0
SPI0
SPI0
SPI1
SPI1
SPI1
SPI1
SPI1
SPI1
SPI1
I/O Lines
SPI0_NPCS0
SPI0_NPCS1
SPI0_NPCS1
SPI0_NPCS2
SPI0_NPCS2
SPI0_NPCS3
SPI1_NPCS0
SPI1_NPCS1
SPI1_NPCS2
SPI1_NPCS3
SPI0_SPCK
SPI1_SPCK
SPI0_MISO
SPI0_MOSI
SPI1_MISO
SPI1_MOSI
Signal
Master
Input
Output
Output
Output
Output
I/O Line
PD24
PD25
PD27
PD28
PD18
PD19
PB18
PB19
PB14
PB15
PB17
PB16
PB0
PB1
PB3
PB2
Type
6355B–ATARM–21-Jun-10
Slave
Output
Input
Input
Unused
Input
Peripheral
A
A
A
B
A
B
A
B
A
A
A
A
B
A
A
A
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