MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 384

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

10.8.6 Dual-Mapping Option Register
MPC555
USER’S MANUAL
DMOR — Dual-Mapping Option Register
Bit(s)
10:12
13:27
28:30
MSB
1:6
7:9
16
31
0
0
0
0
0
RESET:
RESET:
*It is recommended that this field would hold values that are the power of 2 minus 1 (e.g., - 2
17
/
1
0
0
MPC556
DMCS
Name
DME
BA
AT
—
—
—
18
2
0
0
Reserved
Base address. The base address field is compared (along with the address type field) to the
address of the address bus to determine whether an address should be dual-mapped by one
of the memory banks controlled by the memory controller. These bits are used in conjunction
with the AM[11:16] bits in the OR.
Bit 10: is cleared at reset. That way, the default range for the dual mapping is 2 Mbytes. Note
that by setting this bit, the range becomes 4 Mbyte, which includes memory space beyond the
flash EEPROM memory.
Reserved
Address type. This field can be used to specify that accesses involving the memory bank are
limited to a certain address space type. These bits are used in conjunction with the ATM bits
in the OR. The default value at reset is to map data only. For a full definition of address types,
refer to
Reserved
Dual-mapping chip select. This field determines which chip-select pin is assigned for dual
mapping.
000 = CS[0]
001 = CS[1]
010 = CS[2]
011 = CS[3]
1xx = Reserved
Dual mapping enabled. This bit indicates that the contents of the dual-mapping registers and
associated base and option registers are valid and enables the dual-mapping operation. The
default value at reset comes from the internal data bus that reflects the reset configuration
word. See
0 = Dual mapping is not active
1 = Dual mapping is active
19
3
0
0
AM
Freescale Semiconductor, Inc.
*
20
9.5.7.6 Address
4
0
0
For More Information On This Product,
Table 10-9 DMBR Bit Descriptions
10.6 Dual Mapping of the Internal Flash EEPROM Array
21
5
0
0
Go to: www.freescale.com
MEMORY CONTROLLER
Rev. 15 October 2000
22
6
0
0
Types.
RESERVED
23
7
0
0
RESERVED
,
24
8
0
0
Description
25
9
0
0
10
26
0
0
ATM
11
27
0
0
12
28
1
0
for more information.
3
13
29
- 1 = 7 [0b111]).
0
0
RESERVED
0x2F C144
MOTOROLA
14
30
0
0
10-32
LSB
15
31
0
0