MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 31

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

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MPC555 / MPC555
USER’S MANUAL
Figure
Input Sample Window ..................................................................................... 9-2
MPC555 / MPC556 Bus Signals ..................................................................... 9-3
Basic Transfer Protocol .................................................................................. 9-8
Basic Flow Diagram of a Single Beat Read Cycle .......................................... 9-9
Single Beat Read Cycle–Basic Timing–Zero Wait States ............................ 9-10
Single Beat Read Cycle–Basic Timing–One Wait State ............................... 9-11
Basic Flow Diagram of a Single Beat Write Cycle ........................................ 9-12
Single Beat Basic Write Cycle Timing, Zero Wait States ............................. 9-13
Single Beat Basic Write Cycle Timing, One Wait State ................................ 9-14
Single Beat 32-Bit Data
Basic Flow Diagram Of A Burst Read Cycle ................................................ 9-18
Burst-Read Cycle–32-Bit Port Size–Zero Wait State ................................... 9-19
Burst-Read Cycle–32-Bit Port Size–One Wait State .................................... 9-20
Burst-Read Cycle–32-Bit Port Size–Wait States Between Beats ................. 9-21
Burst-Read Cycle, 16-Bit Port Size .............................................................. 9-22
Basic Flow Diagram of a Burst Write Cycle .................................................. 9-23
Burst-Write Cycle, 32-Bit Port Size, Zero Wait States .................................. 9-24
Burst-Inhibit Cycle, 32-Bit Port Size (Emulated Burst) ................................. 9-25
Non-Wrap Burst with Three Beats ................................................................ 9-26
Non-Wrap Burst with One Data Beat ............................................................ 9-27
Internal Operand Representation ................................................................. 9-28
Interface To Different Port Size Devices ...................................................... 9-29
Bus Arbitration Flowchart ............................................................................. 9-31
Masters Signals Basic Connection ............................................................... 9-32
Bus Arbitration Timing Diagram .................................................................... 9-33
Internal Bus Arbitration State Machine ......................................................... 9-35
Termination Signals Protocol Basic Connection ........................................... 9-39
Termination Signals Protocol Timing Diagram ............................................. 9-40
Reservation On Local Bus ............................................................................ 9-41
Reservation On Multilevel Bus Hierarchy ..................................................... 9-42
Retry Transfer Timing–Internal Arbiter ......................................................... 9-44
Retry Transfer Timing–External Arbiter ........................................................ 9-45
Retry On Burst Cycle .................................................................................... 9-46
Basic Flow of an External Master Read Access ........................................... 9-48
Basic Flow of an External Master Write Access ........................................... 9-49
Peripheral Mode: External Master Reads
Peripheral Mode: External Master Writes to MPC555 / MPC556;
Flow of Retry of External Master Read Access ............................................ 9-53
Retry of External Master Access (Internal Arbiter) ....................................... 9-54
Instruction Show Cycle Transaction ............................................................. 9-55
Data Show Cycle Transaction ...................................................................... 9-56
Write Cycle Timing, 16 Bit-Port Size ......................................................... 9-15
from MPC555 / MPC556 — Two Wait States ........................................... 9-50
Two Wait States ........................................................................................ 9-51
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Rev. 15 October 2000
LIST OF FIGURES
MOTOROLA
Number
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