MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 962

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

TPU Reference Manual 17-3, 17-17
TPU2
TPUF 17-14
TPUMCR 17-10
TPUMCR2 17-20
TR 21-54
trace interrupt, 3-47
transaction (bus), 9-8
Transfer
transfer acknowledge (TA), 9-38
transfer error acknowledge (TEA), 9-39
transfer size (TSIZ), 9-37
transfer start (TS), 9-36
transfers, alignment and packaging, 9-28
transfers, burst-inhibited, 9-16
transfers, termination signals, 9-39
Transmission
Transmit
MPC555 / MPC556
USER’S MANUAL
function library 17-4
host interface 17-2
interrupts 17-5
microengine 17-2
operation 17-3
parameter RAM 17-2, 17-22
registers
scheduler 17-2
time
timer channels 17-2
module configuration register 2 (TPUMCR2) 17-20
length options 14-36
complete
/receive status (TX/RX) 16-31
coherency 17-4
emulation support 17-4
event timing 17-3
interchannel communication 17-4
programmable channel service priority 17-4
address map 17-22
channel
decoded channel number register (DCNR) 17-19
development
host
link register (LR) 17-19
module configuration register (TPUMCR) 17-10
service grant latch register (SGLR) 17-19
test configuration register (TCR) 17-12
TPU interrupt configuration register (TICR) 17-14,
bases 17-2
(TC) flag 14-53
interrupt enable (TCIE) 14-54
function select registers (CFSR) 17-15
interrupt
priority registers (CPR) 17-18
support control register (DSCR) 17-12
support status register (DSSR) 17-14
sequence registers (HSQR) 17-16
service request registers (HSSR) 17-17
enable register (CIER) 17-5, 17-15
status register (CISR) 17-5, 17-19
17-21
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Rev. 15 October 2000
INDEX
Transmitter Enable (TE) 14-44
Transmitter enable (TE) 14-46, 14-52
TRE 21-56
Trigger
TRST 22-3
TS, 9-5
TSIZ(0
TSIZ0, 9-1
TSIZ1, 9-1
TSM D-8
T
TSYNC 16-27
Two-cycle mode, SRAM 20-3
TX
TX/RX 16-31
TXECTR 16-33
TXMODE 16-25
TXWARN 16-31
UART D-13
UISA register set 3-11
Universal asynchronous receiver/transmitter (UART)
Unordered exceptions 3-34
User level registers 3-11
Using the TPU Function Library and TPU Emulation
UX bit 3-14
V
V
V
VE bit 3-15
Vector table, exception 3-36
Vector table, exceptions 3-35
V
V
Voltage
V
V
SR
DD
DDA
DDA/2
IH
IL
RH
RL
13-8
13-8
13-5, 13-14, 13-47
bit error (BITERR) 16-31
complete
data
error status flag (TXWARN) 16-31
interrupt enable (TIE) 14-46, 14-54
pin configuration control (TXMODE) 16-25
RAM 14-22
event 13-44
1), 9-4
13-6
Length 16-5
parameters
reference pins 13-5
13-5
13-5, 13-14, 13-47
13-5
13-14
bit (TC) 14-48
interrupt enable (TCIE) 14-46
register empty (TDRE) flag 14-48
D-13
receiver parameters D-15
transmitter parameters D-14
Mode 17-4
–U–
–V–
MOTOROLA
Index-12