MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 150

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC555LFMZP40
Manufacturer:
MOTOLOLA
Quantity:
853
Part Number:
MPC555LFMZP40
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC555LFMZP40
Manufacturer:
MOT
Quantity:
2
Part Number:
MPC555LFMZP40R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
3.10 Instruction Set
MPC555
USER’S MANUAL
All PowerPC instructions are encoded as single words (32 bits). Instruction formats are
consistent among all instruction types, permitting efficient decoding to occur in parallel
with operand accesses. This fixed instruction length and consistent format greatly sim-
plifies instruction pipelining.
The PowerPC instructions are divided into the following categories:
Note that this grouping of the instructions does not indicate which execution unit exe-
cutes a particular instruction or group of instructions.
Integer instructions operate on byte, half-word, and word operands. Floating-point in-
structions operate on single-precision (one word) and double-precision (one double
word) floating-point operands. The PowerPC architecture uses instructions that are
four bytes long and word-aligned. It provides for byte, half-word, and word operand
loads and stores between memory and a set of 32 GPRs.
• Integer instructions include computational and logical instructions.
• Floating-point instructions include floating-point computational instructions, as
• Load/store instructions include integer and floating-point load and store instruc-
• Flow control instructions include branching instructions, condition register logical
• Processor control instructions are used for synchronizing memory accesses.
/
well as instructions that affect the floating-point status and control register (FP-
SCR).
tions.
instructions, trap instructions, and other instructions that affect the instruction
flow.
— Integer arithmetic instructions
— Integer compare instructions
— Integer logical instructions
— Integer rotate and shift instructions
— Floating-point arithmetic instructions
— Floating-point multiply/add instructions
— Floating-point rounding and conversion instructions
— Floating-point compare instructions
— Floating-point status and control instructions
— Integer load and store instructions
— Integer load and store multiple instructions
— Floating-point load and store
— Primitives used to construct atomic memory operations (lwarx and stwcx. in-
— Branch and trap instructions
— Condition register logical instructions
— Move to/from SPR instructions
— Move to/from MSR
— Synchronize
— Instruction synchronize
MPC556
structions)
Freescale Semiconductor, Inc.
For More Information On This Product,
CENTRAL PROCESSING UNIT
Go to: www.freescale.com
Rev. 15 October 2000
MOTOROLA
3-28

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