MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 575

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

MPC555
USER’S MANUAL
Prescaler
Select
MIOS Modulus Counter Submodule
Clock
In the example shown in
for a MDASM configured in the input pulse width measurement mode. When the lead-
ing edge (programmed for being either rising or falling) of the input signal occurs, the
state of the 16-bit counter bus is saved in register B1. When the trailing edge occurs,
the 16-bit counter bus is latched into register A and the content of register B1 is trans-
ferred to register B2. This operation leaves register B1 free for the next leading edge
to occur on the next clock cycle. When enabled, an interrupt is provided after the trail-
ing edge, to notify the software that pulse width measurement data is available for a
new pulse. After the trailing edge, the software has one cycle time of the input signal
to obtain the values for each edge. When software attention is not needed for every
pulse, the interrupt can be disabled. The software can read registers A and B2 coher-
ently (using a 32-bit read instruction) at any time, to get the latest edge measurements.
The software work is less than half that needed with a timer that requires the software
to read one edge and save the value and then wait for the second edge.
or Pin
From
Figure 15-9 MIOS1 Example: Double Capture Pulse Width Measurement
/
MPC556
16-bit Up-Counter
MODULAR INPUT/OUTPUT SUBSYSTEM (MIOS1)
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure
Submodule Bus
Go to: www.freescale.com
Rev. 15 October 2000
Counter
15-9, a counter submodule is used as the time-base
Buses
16-bit
Two
Select
Bus
in IPWM mode (MOD3-MOD0 = 0b0001)
16-bit Register A
16-bit Register B1
16-bit Register B2
MIOS Double Action Submodule
Interrupt
Capture
Trailing
Detect
Edge
Input
Edge
on
MOTOROLA
Input
Pin
15-39