M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 37

• Manufacturer Part Number: M30853FJGP#U3
• Description: IC M32C MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30853FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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1.10 Vector Table
v
J
Chapter 1 Overview
The vector table comes in two types: a special page vector table and an interrupt vector table. The special
page vector table is a fixed vector table. The interrupt vector table can be a fixed or a variable vector table.
Figure 1.10.1 Fixed vector table
1 .
0
1.10.1 Fixed Vector Table
9
0 .
B
The fixed vector table is an address-fixed vector table. The special page vector table is allocated to
addresses FFFE00
FFFFDC
The special page vector table is comprised of two bytes per table. Each vector table must contain the 16
low-order bits of the subroutine's entry address. Each vector table has special page numbers (18 to 255)
which are used in JSRS and JMPS instructions.
The interrupt vector table is comprised of four bytes per table. Each vector table must contain the
interrupt handler routine's entry address.
0
0
3
1
2
9
0
FFFE00
FFFE02
FFFFDB
FFFFDC
FFFFFF
0 -
0
6
1
0 .
0
16
0
5
3 .
through FFFFFF
1
16
16
16
16
16
p
a
g
e
16
19
through FFFFDB
Special page
vector table
Interrupt
vector table
f o
16
3
3
. Figure 1.10.1 shows a fixed vector table.
5
16
, and part of the interrupt vector table is allocated to addresses
255
254
18
FFFFDC
FFFFE0
FFFFE4
FFFFE8
FFFFEC
FFFFF0
FFFFF4
FFFFF8
FFFFFC
Special page number
16
16
16
16
16
16
16
16
16
Undefined instruction
Overflow
BRK instruction
Address match
Watchdog timer
NMI
Reset
1.10 Vector Table