M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 232

• Manufacturer Part Number: M30853FJGP#U3
• Description: IC M32C MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30853FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
e
E
Chapter 4
DIVX
(2) DIVX.size
DIVX
(3) DIVX.L
v
J
*1 When src is indirectly addressed,the code has 00001001
[Number of Bytes/Number of Cycles]
*2 When src is indirectly addressed, the number of bytes and cycles in the table are increased by 1 and 3 respectively.
*3 When (.W) is specified for the size specifier (.size), the number of cycles in the table is increased by 6.
[Number of Bytes/Number of Cycles]
*1 Indirect instruction addressing cannot be used since op-code is 3 bytes.
b7
1 .
b7
.size
0
0000 0001 1
src
Bytes/Cycles
src
Bytes/Cycles
1
.W
9
.B
0 .
B
added at the beginning.
0
0
0
3
1
SIZE
2
9
0
0
0
1
b0 b7
0 -
0
6
1
1 s4 s3 s2 SIZE s1 s0 0
0 .
0
0
5
Instruction Code/Number of Cycles
3 .
Rn
An
[An]
dsp:8[An]
Rn
An
[An]
dsp:8[An]
0
2/18 2/18 2/20
3/40 3/40 3/42
1
Rn
Rn
1
p
a
g
0 s4 s3 s2
An [An] dsp:8[An] dsp:8[SB/FB] dsp:16[An] dsp:16[SB/FB] dsp:24[An] abs16 abs24
An [An] dsp:8[An] dsp:8[SB/FB] dsp:16[An] dsp:16[SB/FB] dsp:24[An] abs16 abs24
e
src
src
b0 b7
214
src
src
f o
R0L/R0/---
R1L/R1/---
R0H/R2/-
R1H/R3/-
A0
A1
[A0]
[A1]
dsp:8[A0]
dsp:8[A1]
---/---/R2R0
---/---/R3R1
--------------------
--------------------
A0
A1
[A0]
[A1]
dsp:8[A0]
dsp:8[A1]
3
3
5
b0 b7
4/42
1 s1 s0 1
3/20
1
1
1
3/20
4/42
s4 s3 s2 s1 s0
1 0 0 1 0
1 0 0 1 1
1 0 0 0 0
1 0 0 0 1
0 0 0 1 0
0 0 0 1 1
0 0 0 0 0
0 0 0 0 1
0 0 1 0 0
0 0 1 0 1
s4 s3 s2 s1 s0
1 0 0 1 0
1 0 0 1 1
- - - - - - - -
- - - - - - - -
0 0 0 1 0
0 0 0 1 1
0 0 0 0 0
0 0 0 0 1
0 0 1 0 0
0 0 1 0 1
1
0
b0
0
1
1
1
(
4/20
5/42
1
b0
dsp:8[SB/FB]
dsp:16[An]
dsp:16[SB/FB]
dsp:24[An]
abs16
abs24
dsp:8[SB/FB]
dsp:16[An]
dsp:16[SB/FB]
dsp:24[An]
abs16
abs24
dsp8
dsp16/abs16
4.2 Instruction Code/Number of Cycles
dsp24/abs24
src code
(
dsp8
4/20
5/42
dsp16/abs16
src
src
dsp24/abs24
src code
dsp:8[SB]
dsp:8[FB]
dsp:16[A0]
dsp:16[A1]
dsp:16[SB]
dsp:16[FB]
dsp:24[A0]
dsp:24[A1]
abs16
abs24
dsp:8[SB]
dsp:8[FB]
dsp:16[A0]
dsp:16[A1]
dsp:16[SB]
dsp:16[FB]
dsp:24[A0]
dsp:24[A1]
abs16
abs24
)
5/20
6/42
)
s4 s3 s2 s1 s0
0 0 1 1 0
0 0 1 1 1
0 1 0 0 0
0 1 0 0 1
0 1 0 1 0
0 1 0 1 1
0 1 1 0 0
0 1 1 0 1
0 1 1 1 1
0 1 1 1 0
s4 s3 s2 s1 s0
0 0 1 1 0
0 0 1 1 1
0 1 0 0 0
0 1 0 0 1
0 1 0 1 0
0 1 0 1 1
0 1 1 0 0
0 1 1 0 1
0 1 1 1 1
0 1 1 1 0
4/20
5/42
5/20
6/42