M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 186

• Manufacturer Part Number: M30853FJGP#U3
• Description: IC M32C MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30853FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
e
E
v
J
Chapter 3 Functions
*1 Since the size is specified for .A(3 bytes) by .L(4 bytes), care must be taken when using the
*2 The ADD, CMP, and MOV instructions are valid in only the G format.
*3 The dsp:8[SP] cannot be used in src or dest of MOV instruction.
*4 The SP cannot be used in src or dest of ADD instruction.
1 .
0
(11)
INDEXB.B/.W*
INDEXBD.B/.W*
INDEXBS.B/.W*
INDEXW.B/.W*
INDEXWD.B/.W*
INDEXWS.B/.W*
INDEXL.B/.W*
INDEXLD.B/.W*
INDEXLS.B/.W*
BITINDEX.B/.W
9
0 .
data table.
B
The table below lists the next instructions that can be executed after each INDEX instruction.
0
0
3
1
2
9
0
0 -
0
Next instructions that can be executed after INDEX
6
1
0 .
0
0
5
3 .
2
2
2
1
2
2
2
2
2
2
ADC, ADD:G*
MULU, OR, SBB, SUB,TST,XOR
The src and dest of above instructions.
ABS, ADC, ADCF, ADD:G*
INC, MAX, MIN, MOV:G*
POP, ROLC, RORC, ROT, SBB, SCcnd, SHA, SHL,
STNZ, STZ, STZX, SUB, TST, XCHG, XOR
The dest of above instructions.
ADC, ADD:G*
MULU, OR, SBB, SUB, TST, XOR
The src of above instructions.
ADC, ADD:G*
MULU, OR, SBB, SUB, TST, XOR
The src and dest of above instructions.
ABS, ADC, ADCF, ADD:G*
INC, MAX, MIN, MOV:G*
POP, ROLC, RORC, ROT, SBB, SHA, SHL, STNZ, STZ,
STZX, SUB, TST, XCHG, XOR
The dest of above instructions.
ADC, ADD:G*
MULU, OR, SBB, SUB, TST, XOR
The src of above instructions.
ADD:G*
The src and dest of above instructions.
ADD:G*
The dest of above instructions.
ADD:G*
The src of above instructions.
BAND, BNAND, BNOR, BNTST, BNXOR, BOR,
BTST:G, BXOR
The src of above instructions.
p
a
g
e
168
4
4
4
, CMP:G, MOV:G*
, CMP:G, MOV:G*
, CMP:G, MOV:G*
f o
4
4
4
4
3
, AND, CMP:G, MAX, MIN, MOV:G*
, AND, CMP:G, MAX, MIN, MOV:G*
, AND, CMP:G, MAX, MIN, MOV:G*
, AND, CMP:G, MAX, MIN, MOV:G*
3
5
3
3
, MUL, MULU, NEG, NOT, OR,
, MUL, MULU, NEG, NOT, OR,
3
3
3
4
4
, SUB
, SHA, SHL, SUB
, SUB
, AND, CLIP, CMP:G, DEC,
, AND, CLIP, CMP:G, DEC,
Valid instruction
3
3
3
3
, MUL,
, MUL,
, MUL,
, MUL,
DIV, DIVU, DIVX, PUSH
The src of above instructions.
DIV, DIVU, DIVX, PUSH, JMPI,
JSRI
The src of above instructions.
JMPI*
The src of above instructions.
BCLR, BMcnd, BNOT, BSET,
BTSTC, BTSTS
The dest of above instructions.
1
, JSRI*
3.3 Index instructions
1