M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 174

• Manufacturer Part Number: M30853FJGP#U3
• Description: IC M32C MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30853FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
e
E
[ Description Example ]
v
XCHG
[ Syntax ]
[ Operation ]
[ Function ]
[ Selectable src/dest ]
[ Flag Change ]
J
Chapter 3
*1 Indirect instruction addressing [dest] can be used in all addressing except R0L/R0/R2R0, R0H/R2/-,
1 .
Change
0
R0L/R0/R2R0
R1L/R1/R3R1
A0/A0/A0
dsp:8[A0]
dsp:16[A0]
dsp:24[A0]
#IMM
9
XCHG.size
dest/[dest]
Flag
0 .
B
• This instruction exchanges contents between
• When (.B) is specified for the size specifier (.size) and
• When (.W) is specified for the size specifier (.size) and
XCHG.B
XCHG.W
XCHG.B
0
R1L/R1/R3R1, and R1H/R3/-.
0
expanded
are placed in
panded
placed in
low-order bits of the address register are placed in
3
1
2
9
0
0 -
U
0
6
1
0 .
0
0
5
src
I
3 .
A1/A1/A1
dsp:8[A1]
dsp:16[A1]
dsp:24[A1]
src
Functions
1
src
src,dest
R0L,A0
R0,A1
R0L,[A0]
data are placed in the address register and the 16 low-order bits of the address register are
O
. When
p
src
data are placed in the address register and the 8 low-order bits of the address register
a
g
src
.
e
B
src
156
src
S
R0H/R2/-
R1H/R3/-
[A0]
dsp:8[SB]
dsp:16[SB]
abs24
f o
is address register, 24 bits data are placed in the address register and the 16
Z
3
3
; A0's 8 low-order bits and R0L's zero-expanded value are exchanged.
5
D
C
[A1]
dsp:8[FB]
dsp:16[FB]
abs16
B , W
eXCHanGe
Exchange
src
R0L/R0/R2R0
R1L/R1/R3R1
A0/A0/A0
dsp:8[A0]
dsp:16[A0]
dsp:24[A0]
and
dest
dest
dest
.
dest
.
is address register(A0, A1), 24 bits of zero-
[ Instruction Code/Number of Cycles ]
is address register, 24 bits of zero- ex-
A1/A1/A1
dsp:8[A1]
dsp:16[A1]
dsp:24[A1]
dest*
R0H/R2/-
R1H/R3/-
[A0]
dsp:8[SB]
dsp:16[SB]
abs24
1
3.2
XCHG
[A1]
dsp:8[FB]
dsp:16[FB]
abs16
Page=
Functions
304