M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 347

• Manufacturer Part Number: M30853FJGP#U3
• Description: IC M32C MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30853FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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Chapter 6
Figure 6.1.7. When executing a read instruction for memory connected to 8-bit bus
1 .
0
9
0 .
B
Data bus (H)
Data bus (L)
Address bus
Instructions
under execution
Fetch code
Instruction
queue buffer
BCLK
WR
RD
0
0
3
Content at jump
address is prefetched at
the same time the
instruction queue buffer
is cleared.
1
2
9
0
0 -
0
6
1
0 .
0
0
5
DR : Indicates a data read.
3 .
(Program area: 16-bit bus without wait state; Data area: 8-bit bus without wait state)
Sample program
Address
FFC024
FFC024
FFC025
FFC026
FFC027
FFC028
FFC029
FFC02A
FFC02B
FFC02C
FFC02C
FFC030
FFC031
FFC032
FFC033
FFC034
FFC035
FFC036
FFC037
FFC038
P : Indicates a prefetch (reading from memory into the instruction queue buffer).
Calculation number of cycles
1
Jump address
: Indicates the locations of the instruction queue buffer that are cleared.
FFC02A FFC02C FFC02E FFC030
p
a
DE
DE
DE
DE
DE
DE
DE
7A
g
JMP TEST_11
e
DE
DE
P
7A
DE
DE
DE
DE
DE
DE
DE
B9FB0080
7A
DE
DE
DE
DE
DE
DE
DE
329
Code
FB
B9
P
f o
FB
B9
TEST_10:
TEST_11:
TEST_12:
3
3
Content at address 8000
5
B9
FB
00
80
P
Instruction
80
00
JMP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
MOV.W:G
JMP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
Fetch
B9FB
DE
7A
00
80
DE
P
7A
Fetch
08000
TEST_11
0080
08000h,R1
TEST_12
DE
7A
DR
MOV.W
AA
16
08001
DE
7A
DR
Content at address 8001
AA
FFC032 FFC034 FFC038 FFC03A
DE
DE
DE
7A
P
DE
DE
Fetch
DE
DE
DE
DE
DE
7A
JMP TEST_12
P
DE
DE
FB
B9
16
P
6.1 Instruction queue buffer
FB
B9
Content at jump address
is prefetched at the
same time the instruction
queue buffer is cleared.
FB
B9
00
80
P
80
00