MC68332GCEH16 Freescale Semiconductor, MC68332GCEH16 Datasheet - Page 163

IC MCU 32BIT 16MHZ 132-PQFP

MC68332GCEH16

Manufacturer Part Number
MC68332GCEH16
Description
IC MCU 32BIT 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68332GCEH16

Core Processor
CPU32
Core Size
32-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
15
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Interface Type
QSPI/SCI/UART
Program Memory Size
Not Required
Total Internal Ram Size
2KB
# I/os (max)
15
Number Of Timers - General Purpose
16
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Controller Family/series
68K
No. Of I/o's
15
Ram Memory Size
2KB
Cpu Speed
16MHz
No. Of Timers
16
Embedded Interface Type
QSPI, SCI, UART
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Data Ram Size
2 KB
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
15
Number Of Timers
16
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68332GCEH16
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
7.4.11 Quadrature Decode (QDEC)
7.5 Motion Control Time Functions
7.5.1 Table Stepper Motor (TSM)
7.5.2 New Input Capture/Transition Counter (NITC)
MC68332
USER’S MANUAL
allowing the latest complete accumulation (over the specified number of periods) to al-
ways be available in a parameter. By using the output compare function in conjunction
with PPWA, an output signal can be generated that is proportional to a specified input
signal. The ratio of the input and output frequency is programmable. One or more out-
put signals with different frequencies, yet proportional and synchronized to a single in-
put signal, can be generated on separate channels.
The quadrature decode function uses two channels to decode a pair of out-of-phase
signals in order to present the CPU with directional information and a position value.
It is particularly suitable for use with slotted encoders employed in motor control. The
function derives full resolution from the encoder signals and provides a 16-bit position
counter with rollover/under indication via an interrupt.
The counter in parameter RAM is updated when a valid transition is detected on either
one of the two inputs. The counter is incremented or decremented depending on the
lead/lag relationship of the two signals at the time of servicing the transition. The user
can read or write the counter at any time. The counter is free running, overflowing to
$0000 or underflowing to $FFFF depending on direction. The QDEC function also pro-
vides a time stamp referenced to TCR1 for every valid signal edge and the ability for
the host CPU to obtain the latest TCR1 value. This feature allows position interpolation
by the host CPU between counts at very slow count rates.
The following paragraphs describe factory-programmed time functions implemented
in the motion-control microcode ROM. A complete description of the functions is be-
yond the scope of this manual. Refer to the TPU Reference Manual (TPURM/AD) for
additional information.
The TSM function provides for acceleration and deceleration control of a stepper mo-
tor with a programmable number of step rates up to 58. TSM uses a table in parameter
RAM, rather than an algorithm, to define the stepper motor acceleration profile, allow-
ing the user to fully define the profile. In addition, a slew rate parameter allows fine
control of the terminal running speed of the motor independent of the acceleration ta-
ble. The CPU need only write a desired position, and the TPU accelerates, slews, and
decelerates the motor to the required position. Full and half step support is provided
for two-phase motors. In addition, a slew rate parameter allows fine control of the ter-
minal running speed of the motor independent of the acceleration table.
Any channel of the TPU can capture the value of a specified TCR or any specified lo-
cation in parameter RAM upon the occurrence of each transition or specified number
of transitions, and then generate an interrupt request to notify the bus master. The
times of the most recent two transitions are maintained in parameter RAM. A channel
can perform input captures continually, or a channel can detect a single transition or
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
TIME PROCESSOR UNIT
7-9

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