MC68332GCEH16 Freescale Semiconductor, MC68332GCEH16 Datasheet - Page 147

IC MCU 32BIT 16MHZ 132-PQFP

MC68332GCEH16

Manufacturer Part Number
MC68332GCEH16
Description
IC MCU 32BIT 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68332GCEH16

Core Processor
CPU32
Core Size
32-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
15
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Interface Type
QSPI/SCI/UART
Program Memory Size
Not Required
Total Internal Ram Size
2KB
# I/os (max)
15
Number Of Timers - General Purpose
16
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Controller Family/series
68K
No. Of I/o's
15
Ram Memory Size
2KB
Cpu Speed
16MHz
No. Of Timers
16
Embedded Interface Type
QSPI, SCI, UART
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Data Ram Size
2 KB
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
15
Number Of Timers
16
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68332GCEH16
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
6.4.1.2 Status Register
6.4.1.3 Data Register
6.4.2 SCI Pins
6.4.3 SCI Operation
6.4.3.1 Definition of Terms
MC68332
USER’S MANUAL
The SCI status register (SCSR) contains flags that show SCI operating conditions.
These flags are cleared either by SCI hardware or by a read/write sequence. In gen-
eral, flags are cleared by reading the SCSR, then reading (receiver status bits) or writ-
ing (transmitter status bits) the SCDR. A long-word read can consecutively access
both the SCSR and SCDR. This action clears receive status flag bits that were set at
the time of the read, but does not clear TDRE or TC flags.
If an internal SCI signal for setting a status bit comes after the CPU has read the as-
serted status bits, but before the CPU has written or read the SCDR, the newly set sta-
tus bit is not cleared. The SCSR must be read again with the bit set, and the SCDR
must be written or read before the status bit is cleared.
Reading either byte of the SCSR causes all 16 bits to be accessed, and any status bit
already set in either byte is cleared on a subsequent read or write of the SCDR.
The SCDR contains two data registers at the same address. The RDR is a read-only
register that contains data received by the SCI serial interface. The data comes into
the receive serial shifter and is transferred to the RDR. The TDR is a write-only register
that contains data to be transmitted. The data is first written to the TDR, then trans-
ferred to the transmit serial shifter, where additional format bits are added before trans-
mission. R[7:0]/T[7:0] contain either the first eight data bits received when the SCDR
is read, or the first eight data bits to be transmitted when the SCDR is written. R8/T8
are used when the SCI is configured for 9-bit operation. When it is configured for 8-bit
operation, they have no meaning or effect.
Two unidirectional pins, TXD (transmit data) and RXD (receive data), are associated
with the SCI. TXD can be used by the SCI or for general-purpose I/O. Function is as-
signed by the port QS pin assignment register (PQSPAR). The receive data (RXD) pin
is dedicated to the SCI. Table 6-4 shows SCI pin function.
SCI status flags in the SPSR support polled operation, or interrupt-driven operation
can be employed by the interrupt enable bits in SCCR1.
• Bit-Time — The time required to transmit or receive one bit of data; one cycle of
the baud frequency.
Transmit Data
Receive Data
Pin Names
Freescale Semiconductor, Inc.
For More Information On This Product,
Mnemonics
RXD
TXD
Table 6-4 SCI Pin Function
QUEUED SERIAL MODULE
Go to: www.freescale.com
Transmitter Disabled
Transmitter Enabled
Receiver Disabled
Receiver Enabled
Mode
Serial Data Output from SCI
Serial Data Input to SCI
General-Purposed I/O
Function
Not Used
6-25

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