MC68332GCEH16 Freescale Semiconductor, MC68332GCEH16 Datasheet - Page 108

• Manufacturer Part Number: MC68332GCEH16
• Description: IC MCU 32BIT 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332GCEH16

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Interface Type: QSPI/SCI/UART
• Program Memory Size: Not Required
• Total Internal Ram Size: 2KB
• # I/os (max): 15
• Number Of Timers - General Purpose: 16
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 16
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

5-10
ANDI to CCR
ANDI to SR
Instruction
CMPM
ADDQ
BCHG
BGND
CMPA
CMPA
ABCD
ADDA
ADDX
BCLR
BKPT
BSET
CHK2
BTST
CMPI
CMPI
ADDI
ANDI
CMP
ADD
AND
ASR
BRA
BSR
CHK
ASL
CLR
Bcc
1
#<data>, <ea>
#<data>, <ea>
#<data>, <ea>
#<data>, <ea>
#<data>, <ea>
#<data>, <ea>
#<data>, <ea>
#<data>, <ea>
#<data>, <ea>
#<data>, CCR
– (An), – (An)
– (An), – (An)
(An) +, (An) +
#<data>, SR
#<data>, Dn
#<data>, Dn
Freescale Semiconductor, Inc.
Dn, <ea>
<ea>, Dn
<ea>, An
<ea>, Dn
Dn, <ea>
Dn, <ea>
Dn, <ea>
Dn, <ea>
Dn, <ea>
<ea>, Dn
<ea>, Rn
<ea>, Dn
<ea>, An
<ea>, An
<ea>, Rn
#<data>
Syntax
<label>
<label>
<label>
Dn, Dn
Dn, Dn
Dn, Dn
Dn, Dn
For More Information On This Product,
Table 5-1 Instruction Set Summary
Í
Í
Í
none
CENTRAL PROCESSING UNIT
Go to: www.freescale.com
8, 16, 32
Operand Size
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
16, 32
16, 32
16, 32
16, 32
8, 32
8, 32
8, 32
8, 32
none
none
8, 32
8, 32
8, 32
8, 32
16
16
16
8
8
8
Lower bound Rn Upper bound, CCR shows result
If breakpoint cycle acknowledged, then execute
If Rn < lower bound or Rn > upper bound, then
PC
background mode, else format/vector offset
Immediate data + Destination
Immediate data + Destination
Source
If Dn < 0 or Dn < (ea), then CHK exception
(Destination – Source), CCR shows results
(Destination – Source), CCR shows results
(Destination – Source), CCR shows results
(Destination – Source), CCR shows results
returned operation word, else trap as illegal
SP – 4
(Destination – Data), CCR shows results
(Destination – Data), CCR shows results
Source + Destination + X
If background mode enabled, then enter
X/C
(<bit number> of destination)
Source + Destination
Source + Destination
If condition true, then PC + d
Source · Destination
(<bit number> of destination)
(<bit number> of destination)
(<bit number> of destination)
Data · Destination
– (SSP); SR
10
0
+ Destination
Source · CCR
0
1
SP; PC
Source · SR
bit of destination
PC + d
CHK exception
bit of destination
bit of destination
Operation
instruction.
– (SSP);
Destination
– (SSP); (vector)
(SP); PC + d
10
+ X
PC
Destination
Destination
CCR
SR
USER’S MANUAL
Destination
Destination
Destination
Destination
Destination
Destination
Z
X/C
PC
Z;
Z;
Z
MC68332
PC
0
PC