MC68332GCEH16 Freescale Semiconductor, MC68332GCEH16 Datasheet - Page 116

IC MCU 32BIT 16MHZ 132-PQFP

MC68332GCEH16

Manufacturer Part Number
MC68332GCEH16
Description
IC MCU 32BIT 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68332GCEH16

Core Processor
CPU32
Core Size
32-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
15
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Interface Type
QSPI/SCI/UART
Program Memory Size
Not Required
Total Internal Ram Size
2KB
# I/os (max)
15
Number Of Timers - General Purpose
16
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Controller Family/series
68K
No. Of I/o's
15
Ram Memory Size
2KB
Cpu Speed
16MHz
No. Of Timers
16
Embedded Interface Type
QSPI, SCI, UART
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Data Ram Size
2 KB
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
15
Number Of Timers
16
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68332GCEH16
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
5.10.2.2.1 External BKPT Signal
5.10.2.2.2 BGND Instruction
5.10.2.2.3 Double Bus Fault
5.10.2.2.4 Peripheral Breakpoints
5.10.2.3 Entering BDM
5-18
Once enabled, BDM is initiated whenever assertion of BKPT is acknowledged. If BDM
is disabled, a breakpoint exception (vector $0C) is acknowledged. The BKPT input has
the same timing relationship to the data strobe trailing edge as does read cycle data.
There is no breakpoint acknowledge bus cycle when BDM is entered.
An illegal instruction, $4AFA, is reserved for use by development tools. The CPU32
defines $4AFA (BGND) to be a BDM entry point when BDM is enabled. If BDM is dis-
abled, an illegal instruction trap is acknowledged.
The CPU32 normally treats a double bus fault, or two bus faults in succession, as a
catastrophic system error, and halts. When this condition occurs during initial system
debug (a fault in the reset logic), further debugging is impossible until the problem is
corrected. In BDM, the fault can be temporarily bypassed, so that the origin of the fault
can be isolated and eliminated.
CPU32 peripheral breakpoints are implemented in the same way as external break-
points — peripherals request breakpoints by asserting the BKPT signal. Consult the
appropriate peripheral user's manual for additional details on the generation of periph-
eral breakpoints.
When the processor detects a breakpoint or a double bus fault, or decodes a BGND
instruction, it suspends instruction execution and asserts the FREEZE output. This is
the first indication that the processor has entered BDM. Once FREEZE has been as-
serted, the CPU enables the serial communication hardware and awaits a command.
The CPU writes a unique value indicating the source of BDM transition into temporary
register A (ATEMP) as part of the process of entering BDM. A user can poll ATEMP
and determine the source (see Table 5-4) by issuing a read system register command
(RSREG). ATEMP is used in most debugger commands for temporary storage — it is
imperative that the RSREG command be the first command issued after transition into
BDM.
*Special status word (SSW) is described in detail in the CPU32 Reference Manual (CPU32RM/AD).
Hardware Breakpoint
BGND Instruction
Double Bus Fault
Source
Table 5-4 Polling the BDM Entry Source
Freescale Semiconductor, Inc.
For More Information On This Product,
CENTRAL PROCESSING UNIT
Go to: www.freescale.com
ATEMP[31:16]
$0000
$0000
SSW*
ATEMP[15:0]
$FFFF
$0001
$0000
USER’S MANUAL
MC68332

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