Z16F6411FI20SG Zilog, Z16F6411FI20SG Datasheet - Page 84

• Manufacturer Part Number: Z16F6411FI20SG
• Description: IC ZNEO MCU FLASH 64K 80QFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F6411FI20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-BQFP
• Processor Series: Z16F6x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4571

GPIO Alternate Functions
PS022008-0810
System
Clock
Data
Bus
Data Register
Port Output
D
Many GPIO port pins are used for GPIO and to provide access to the on-chip peripheral
functions such as timers, serial communication devices, and external data and address bus.
The Port A–K alternate function registers configure these pins for either GPIO or alternate
function operation. When a pin is configured for alternate function, control of the port pin
direction (I/O) is passed from the Port A–K data direction registers to the alternate function
assigned to this pin.
port pin.
For detailed information on enabling the external interface data signals, see
Interface
the other GPIO functionality including alternate functions cannot be used.
Q
on page 39. When the external interface data signals are enabled for an 8-bit port,
Port Output Control
Port Data Direction
Figure 17. GPIO Port Pin Block Diagram
Table 24
System
Clock
P R E L I M I N A R Y
on page 70 lists the alternate functions associated with each
Data Register
Port Input
Q
D
Pull-up Enable
Schmitt Trigger
GND
VDD
General-Purpose Input/Output
Product Specification
ZNEO
External
VDD
Z16F Series
Port
Pin
69