Z16F6411FI20SG Zilog, Z16F6411FI20SG Datasheet - Page 142

• Manufacturer Part Number: Z16F6411FI20SG
• Description: IC ZNEO MCU FLASH 64K 80QFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F6411FI20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-BQFP
• Processor Series: Z16F6x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4571

Table 71. PWM Control 1 Register (PWMCTL1)
BITS
FIELD
RESET
R/W
ADDR
PS022008-0810
Bit Position
[7:6]
RLFREQ[1:0]
[5]
INDEN
[4]
Pol2
[3]
Pol1
[2]
Pol0
[1:0]
PRES
PWM Control 1 Register
RLFREQ[1:0]
7
The PWM Control 1 (PWMCTL1) register controls portions of PWM operation.
Value (H)
R/W
00
00
01
10
00
01
10
11
11
0
1
1
0
1
0
1
0
6
Description
Reload Event Frequency
This bit field is buffered. Changes to the reload event frequency takes effect
at the end of the current PWM period. Reads always return the bit values
from the temporary holding register. 
PWM reload event occurs at the end of every PWM period.
PWM reload event occurs once every two PWM periods.
PWM reload event occurs once every four PWM periods.
PWM reload event occurs once every eight PWM periods.
Independent PWM Mode Enable
PWM outputs operate as three complementary pairs.
PWM outputs operate as six independent channels.
Invert output polarity for channel pair PWM2.
Non-inverted polarity for channel pair PWM2.
Invert output polarity for channel pair PWM1.
Non-inverted polarity for channel pair PWM1.
Invert output polarity for channel pair PWM0.
Non-inverted polarity for channel pair PWM0.
PWM Prescaler
The prescaler divides down the PWM input clock (either the system clock or
the PWMIN external input). This field is buffered. Changes to this field take
effect at the next PWM reload event. Reads always return the values from
the temporary holding register.
Divide by 1
Divide by 2
Divide by 4
Divide by 8
INDEN
R/W
5
0
P R E L I M I N A R Y
Pol45
R/W
4
0
FF_E381H
Pol23
R/W
3
0
Pol10
R/W
2
0
Multi-Channel PWM Timer
Product Specification
ZNEO
1
PRES[1:0]
Z16F Series
R/W
00
0
127