PIC18F67J10-I/PT Microchip Technology, PIC18F67J10-I/PT Datasheet - Page 394

• Manufacturer Part Number: PIC18F67J10-I/PT
• Description: IC PIC MCU FLASH 64KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J10-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 11
• Height: 1 mm
• Length: 10 mm
• Supply Voltage (max): 2.7 V, 3.6 V
• Supply Voltage (min): 2 V, 2.7 V
• Width: 10 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J10
RESET ............................................................................. 319
Reset .................................................................................. 43
Resets .............................................................................. 277
RETFIE ............................................................................ 320
RETLW ............................................................................. 320
RETURN .......................................................................... 321
Return Address Stack ........................................................ 59
Return Stack Pointer (STKPTR) ........................................ 60
RLCF ................................................................................ 321
RLNCF ............................................................................. 322
RRCF ............................................................................... 322
RRNCF ............................................................................. 323
S
SCKx ................................................................................ 189
SDIx ................................................................................. 189
SDOx ................................................................................ 189
SEC_IDLE Mode ................................................................ 40
SEC_RUN Mode ................................................................ 36
Serial Clock, SCKx ........................................................... 189
Serial Data In (SDIx) ........................................................ 189
Serial Data Out (SDOx) .................................................... 189
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 323
Slave Select (SSx) ........................................................... 189
DS39663D-page 392
IPR2 (Peripheral Interrupt Priority 2) ........................ 117
IPR3 (Peripheral Interrupt Priority 3) ........................ 118
MEMCON (External Memory Bus Control) ................ 92
OSCCON (Oscillator Control) .................................... 32
OSCTUNE (PLL Control) ........................................... 29
PIE1 (Peripheral Interrupt Enable 1) ........................ 113
PIE2 (Peripheral Interrupt Enable 2) ........................ 114
PIE3 (Peripheral Interrupt Enable 3) ........................ 115
PIR1 (Peripheral Interrupt Request (Flag) 1) ........... 110
PIR2 (Peripheral Interrupt Request (Flag) 2) ........... 111
PIR3 (Peripheral Interrupt Request (Flag) 3) ........... 112
PSPCON (Parallel Slave Port Control) .................... 145
RCON (Reset Control) ....................................... 44, 119
RCSTAx (Receive Status and Control) .................... 237
SSPxADD (MSSPx Address) ................................... 203
SSPxCON1 (MSSPx Control 1, I
SSPxCON1 (MSSPx Control 1, SPI Mode) ............. 191
SSPxCON2 (MSSPx Control 2, I
SSPxSTAT (MSSPx Status, I
SSPxSTAT (MSSPx Status, SPI Mode) .................. 190
STATUS ..................................................................... 73
STKPTR (Stack Pointer) ............................................ 60
T0CON (Timer0 Control) .......................................... 147
T1CON (Timer1 Control) .......................................... 151
T2CON (Timer2 Control) .......................................... 157
T3CON (Timer3 Control) .......................................... 159
T4CON (Timer 4 Control) ......................................... 163
TXSTAx (Transmit Status and Control) ................... 236
WDTCON (Watchdog Timer Control) ....................... 283
Brown-out Reset (BOR) ............................................. 43
MCLR Reset, During Power-Managed Modes ........... 43
MCLR Reset, Normal Operation ................................ 43
Power-on Reset (POR) .............................................. 43
RESET Instruction ..................................................... 43
Stack Full Reset ......................................................... 43
Stack Underflow Reset .............................................. 43
Watchdog Timer (WDT) Reset ................................... 43
Brown-out Reset (BOR) ........................................... 277
Oscillator Start-up Timer (OST) ............................... 277
Power-on Reset (POR) ............................................ 277
Power-up Timer (PWRT) ......................................... 277
2
C Mode) ................... 200
2
2
C Mode) .............. 201
C Mode) .............. 202
Preliminary
SLEEP ............................................................................. 324
Sleep
Software Simulator (MPLAB SIM) ................................... 340
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ........................................... 277
SPI Mode (MSSP) ........................................................... 189
SSPOV ............................................................................ 224
SSPOV Status Flag ......................................................... 224
SSPxSTAT Register
SSx .................................................................................. 189
Stack Full/Underflow Resets .............................................. 61
SUBFSR .......................................................................... 335
SUBFWB ......................................................................... 324
SUBLW ............................................................................ 325
SUBULNK ........................................................................ 335
SUBWF ............................................................................ 325
SUBWFB ......................................................................... 326
SWAPF ............................................................................ 326
T
Table Pointer Operations (table) ........................................ 84
Table Reads/Table Writes ................................................. 61
TBLRD ............................................................................. 327
TBLWT ............................................................................. 328
Timer0 .............................................................................. 147
Timer1 .............................................................................. 151
OSC1 and OSC2 Pin States ...................................... 33
Associated Registers ............................................... 198
Bus Mode Compatibility ........................................... 197
Clock Speed, Interactions ........................................ 197
Effects of a Reset .................................................... 197
Enabling SPI I/O ...................................................... 193
Master Mode ............................................................ 194
Master/Slave Connection ......................................... 193
Operation ................................................................. 192
Operation in Power-Managed Modes ...................... 197
Serial Clock .............................................................. 189
Serial Data In ........................................................... 189
Serial Data Out ........................................................ 189
Slave Mode .............................................................. 195
Slave Select ............................................................. 189
Slave Select Synchronization .................................. 195
SPI Clock ................................................................. 194
SSPxBUF Register .................................................. 194
SSPxSR Register .................................................... 194
Typical Connection .................................................. 193
R/W Bit ............................................................ 204, 206
Associated Registers ............................................... 149
Operation ................................................................. 148
Overflow Interrupt .................................................... 149
Prescaler ................................................................. 149
Prescaler Assignment (PSA Bit) .............................. 149
Prescaler Select (T0PS2:T0PS0 Bits) ..................... 149
Prescaler. See Prescaler, Timer0.
Reads and Writes in 16-bit Mode ............................ 148
Source Edge Select (T0SE Bit) ............................... 148
Source Select (T0CS Bit) ......................................... 148
16-bit Read/Write Mode ........................................... 153
Associated Registers ............................................... 155
Interrupt ................................................................... 154
Low-Power Option ................................................... 153
Operation ................................................................. 152
Oscillator .......................................................... 151, 153
Oscillator, as Secondary Clock .................................. 30
Switching Assignment ..................................... 149
Layout Considerations ..................................... 154
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