PIC18F67J10-I/PT Microchip Technology, PIC18F67J10-I/PT Datasheet - Page 116

• Manufacturer Part Number: PIC18F67J10-I/PT
• Description: IC PIC MCU FLASH 64KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J10-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 11
• Height: 1 mm
• Length: 10 mm
• Supply Voltage (max): 2.7 V, 3.6 V
• Supply Voltage (min): 2 V, 2.7 V
• Width: 10 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J10
REGISTER 9-8:
DS39663D-page 114
bit 7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
bit 7
OSCFIE: Oscillator Fail Interrupt Enable bit
1 = Enabled
0 = Disabled
CMIE: Comparator Interrupt Enable bit
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
BCL1IE: Bus Collision Interrupt Enable bit (MSSP1 module)
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
TMR3IE: TMR3 Overflow Interrupt Enable bit
1 = Enabled
0 = Disabled
CCP2IE: ECCP2 Interrupt Enable bit
1 = Enabled
0 = Disabled
Legend:
R = Readable bit
-n = Value at POR
OSCFIE
R/W-0
R/W-0
CMIE
U-0
Preliminary
—
W = Writable bit
‘1’ = Bit is set
U-0
—
BCL1IE
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
© 2006 Microchip Technology Inc.
x = Bit is unknown
TMR3IE
R/W-0
CCP2IE
R/W-0
bit 0