PIC18F67J10-I/PT Microchip Technology, PIC18F67J10-I/PT Datasheet - Page 390

• Manufacturer Part Number: PIC18F67J10-I/PT
• Description: IC PIC MCU FLASH 64KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J10-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 11
• Height: 1 mm
• Length: 10 mm
• Supply Voltage (max): 2.7 V, 3.6 V
• Supply Voltage (min): 2 V, 2.7 V
• Width: 10 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J10
I
I/O Ports ........................................................................... 121
I
INCF ................................................................................. 310
INCFSZ ............................................................................ 311
In-Circuit Debugger .......................................................... 288
In-Circuit Serial Programming (ICSP) ...................... 277, 288
Indexed Literal Offset Addressing
Indexed Literal Offset Mode ............................................. 336
Indirect Addressing ............................................................ 75
INFSNZ ............................................................................ 311
Initialization Conditions for all Registers ...................... 49–53
Instruction Cycle ................................................................. 62
Instruction Set .................................................................. 289
DS39663D-page 388
2
C Mode (MSSP)
Pin Capabilities ........................................................ 121
Acknowledge Sequence Timing ............................... 227
Associated Registers ............................................... 233
Baud Rate Generator ............................................... 220
Bus Collision
Clock Arbitration ....................................................... 221
Clock Stretching ....................................................... 213
Clock Synchronization and the CKP bit ................... 214
Effects of a Reset ..................................................... 228
General Call Address Support ................................. 217
I
Master Mode ............................................................ 218
Multi-Master Communication, Bus Collision and Arbitra-
Multi-Master Mode ................................................... 228
Operation ................................................................. 204
Read/Write Bit Information (R/W Bit) ............... 204, 206
Registers .................................................................. 199
Serial Clock (RC3/SCKx/SCLx) ............................... 206
Slave Mode .............................................................. 204
Sleep Operation ....................................................... 228
Stop Condition Timing .............................................. 227
and Standard PIC18 Instructions ............................. 336
Clocking Scheme ....................................................... 62
Flow/Pipelining ........................................................... 62
ADDLW .................................................................... 295
ADDWF .................................................................... 295
ADDWF (Indexed Literal Offset Mode) .................... 337
ADDWFC ................................................................. 296
ANDLW .................................................................... 296
ANDWF .................................................................... 297
BC ............................................................................ 297
BCF .......................................................................... 298
BN ............................................................................ 298
BNC ......................................................................... 299
BNN ......................................................................... 299
BNOV ....................................................................... 300
2
C Clock Rate w/BRG ............................................. 220
During a Repeated Start Condition .................. 231
During a Stop Condition ................................... 232
10-Bit Slave Receive Mode (SEN = 1) ............. 213
10-Bit Slave Transmit Mode ............................. 213
7-Bit Slave Receive Mode (SEN = 1) ............... 213
7-Bit Slave Transmit Mode ............................... 213
Operation ......................................................... 219
Reception ......................................................... 224
Repeated Start Condition Timing ..................... 223
Start Condition Timing ..................................... 222
Transmission .................................................... 224
tion ................................................................... 228
Addressing ....................................................... 204
Reception ......................................................... 206
Transmission .................................................... 206
Preliminary
BNZ ......................................................................... 300
BOV ......................................................................... 303
BRA ......................................................................... 301
BSF .......................................................................... 301
BSF (Indexed Literal Offset Mode) .......................... 337
BTFSC ..................................................................... 302
BTFSS ..................................................................... 302
BTG ......................................................................... 303
BZ ............................................................................ 304
CALL ........................................................................ 304
CLRF ....................................................................... 305
CLRWDT ................................................................. 305
COMF ...................................................................... 306
CPFSEQ .................................................................. 306
CPFSGT .................................................................. 307
CPFSLT ................................................................... 307
DAW ........................................................................ 308
DCFSNZ .................................................................. 309
DECF ....................................................................... 308
DECFSZ .................................................................. 309
Extended Instructions .............................................. 331
General Format ........................................................ 291
GOTO ...................................................................... 310
INCF ........................................................................ 310
INCFSZ .................................................................... 311
INFSNZ .................................................................... 311
IORLW ..................................................................... 312
IORWF ..................................................................... 312
LFSR ....................................................................... 313
MOVF ...................................................................... 313
MOVFF .................................................................... 314
MOVLB .................................................................... 314
MOVLW ................................................................... 315
MOVWF ................................................................... 315
MULLW .................................................................... 316
MULWF .................................................................... 316
NEGF ....................................................................... 317
NOP ......................................................................... 317
Opcode Field Descriptions ....................................... 290
POP ......................................................................... 318
PUSH ....................................................................... 318
RCALL ..................................................................... 319
RESET ..................................................................... 319
RETFIE .................................................................... 320
RETLW .................................................................... 320
RETURN .................................................................. 321
RLCF ....................................................................... 321
RLNCF ..................................................................... 322
RRCF ....................................................................... 322
RRNCF .................................................................... 323
SETF ....................................................................... 323
SETF (Indexed Literal Offset Mode) ........................ 337
SLEEP ..................................................................... 324
Standard Instructions ............................................... 289
SUBFWB ................................................................. 324
SUBLW .................................................................... 325
SUBWF .................................................................... 325
SUBWFB ................................................................. 326
SWAPF .................................................................... 326
TBLRD ..................................................................... 327
TBLWT .................................................................... 328
TSTFSZ ................................................................... 329
Considerations when Enabling ........................ 336
Syntax .............................................................. 331
Use with MPLAB IDE Tools ............................. 338
© 2006 Microchip Technology Inc.