PIC18F67J10-I/PT Microchip Technology, PIC18F67J10-I/PT Datasheet - Page 235

• Manufacturer Part Number: PIC18F67J10-I/PT
• Description: IC PIC MCU FLASH 64KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J10-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 11
• Height: 1 mm
• Length: 10 mm
• Supply Voltage (max): 2.7 V, 3.6 V
• Supply Voltage (min): 2 V, 2.7 V
• Width: 10 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 18-4:
© 2006 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
PIR3
PIE3
IPR3
TRISC
TRISD
SSP1BUF
SSP1ADD
SSPxCON1
SSPxCON2
SSPxSTAT
SSP2BUF
SSP2ADD
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the MSSP module in I
Name
MSSP1 Receive Buffer/Transmit Register
MSSP1 Address Register (I
MSSP1 Baud Rate Reload Register (I
MSSP2 Receive Buffer/Transmit Register
MSSP2 Address Register (I
MSSP2 Baud Rate Reload Register (I
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIE
OSCFIP
OSCFIF
SSP2IF
SSP2IE
SSP2IP
TRISC7
TRISD7
PSPIF
PSPIE
PSPIP
WCOL
GCEN
Bit 7
SMP
REGISTERS ASSOCIATED WITH I
ACKSTAT
TRISC6
TRISD6
BCL2IF
BCL2IE
BCL2IP
SSPOV
CMIE
CMIP
CMIF
ADIF
ADIE
ADIP
Bit 6
CKE
ADMSK5
ACKDT/
TRISC5
TRISD5
SSPEN
RC1IE
RC1IP
RC2IE
RC2IP
RC1IF
RC2IF
Bit 5
D/A
2
2
—
—
—
C™ Slave mode),
C Slave mode),
ADMSK4
ACKEN/
TRISC4
TRISD4
Preliminary
INT0IE
TX1IE
TX1IP
TX2IE
TX2IP
TX1IF
TX2IF
2
2
Bit 4
CKP
C Master mode)
C Master mode)
—
—
—
P
2
C™ OPERATION
ADMSK3
TMR4IF
TMR4IE
TMR4IP
TRISC3
TRISD3
SSP1IF
SSP1IE
SSP1IP
BCL1IE
BCL1IP
BCL1IF
SSPM3
RCEN/
RBIE
Bit 3
S
ADMSK2
TMR0IF
CCP1IF
CCP1IE
CCP1IP
CCP5IF
CCP5IE
CCP5IP
TRISC2
TRISD2
SSPM2
PEN/
Bit 2
R/W
—
—
—
PIC18F87J10
ADMSK1
TMR2IE
TMR2IP
TMR3IE
TMR3IP
TMR2IF
TMR3IF
CCP4IF
CCP4IE
CCP4IP
TRISC1
TRISD1
SSPM1
INT0IF
RSEN/
Bit 1
UA
2
TMR1IE
TMR1IP
TMR1IF
CCP2IF
CCP2IE
CCP2IP
CCP3IF
CCP3IE
CCP3IP
TRISC0
TRISD0
SSPM0
C™ mode.
RBIF
DS39663D-page 233
Bit 0
SEN
BF
on Page
Values
50, 53
50, 53
Reset
50, 53
49
51
51
51
51
51
51
51
51
51
52
52
50
53
50
53