PIC18F67J10-I/PT Microchip Technology, PIC18F67J10-I/PT Datasheet - Page 124

• Manufacturer Part Number: PIC18F67J10-I/PT
• Description: IC PIC MCU FLASH 64KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J10-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 11
• Height: 1 mm
• Length: 10 mm
• Supply Voltage (max): 2.7 V, 3.6 V
• Supply Voltage (min): 2 V, 2.7 V
• Width: 10 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J10
10.1.2
The voltage tolerance of pins used as device inputs is
dependent on the pin’s input function. Pins that are used
as digital only inputs are able to handle DC voltages up
to 5.5V, a level typical for digital logic circuits. In contrast,
pins that also have analog input functions of any kind
can only tolerate voltages up to V
beyond V
Table 10-2 summarizes the input capabilities. Refer to
Section 26.0 “Electrical Characteristics” for more
details.
TABLE 10-2:
DS39663D-page 122
PORTA<5:0>
PORTC<1:0>
PORTF<6:1>
PORTH<7:4>
PORTB<7:0>
PORTC<7:2>
PORTD<7:0>
PORTE<7:0>
PORTF<7>
PORTG<4:0>
PORTH<3:0>
PORTJ<7:0>
Note 1:
Port or Pin
DD
These ports are not available on 64-pin
devices.
INPUT PINS AND VOLTAGE
CONSIDERATIONS
(1)
(1)
(1)
on these pins should be avoided.
INPUT VOLTAGE LEVELS
Tolerated
Input
5.5V
V
DD
Only V
tolerated.
Tolerates input levels
above V
most standard logic.
DD
. Voltage excursions
Description
DD
DD
input levels
, useful for
Preliminary
10.2
PORTA is a 6-bit wide, bidirectional port. The corre-
sponding data direction register is TRISA. Setting a
TRISA bit (= 1) will make the corresponding PORTA pin
an input (i.e., put the corresponding output driver in a
high-impedance mode). Clearing a TRISA bit (= 0) will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).
Reading the PORTA register reads the status of the
pins, whereas writing to it, will write to the port latch.
The Data Latch register (LATA) is also memory mapped.
Read-modify-write operations on the LATA register read
and write the latched output value for PORTA.
The RA4 pin is multiplexed with the Timer0 module
clock input to become the RA4/T0CKI pin. The other
PORTA pins are multiplexed with the analog V
V
converter inputs is selected by clearing or setting the
PCFG3:PCFG0 control bits in the ADCON1 register.
The RA4/T0CKI pin is a Schmitt Trigger input. All other
PORTA pins have TTL input levels and full CMOS
output drivers.
The TRISA register controls the direction of the PORTA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EXAMPLE 10-1:
CLRF
CLRF
MOVLW
MOVWF
MOVWF
MOVWF
MOVLW
MOVWF
REF
Note:
- inputs. The operation of pins RA5:RA0 as A/D
PORTA, TRISA and
LATA Registers
PORTA
LATA
07h
ADCON1 ; for digital inputs
07h
CMCON
0CFh
TRISA
RA5 and RA3:RA0 are configured as
analog inputs on any Reset and are read
as ‘0’. RA4 is configured as a digital input.
; Initialize PORTA by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Configure A/D
; Configure comparators
; for digital input
; Value used to
; initialize data
; direction
; Set RA<3:0> as inputs
; RA<5:4> as outputs
INITIALIZING PORTA
© 2006 Microchip Technology Inc.
REF
+ and