PIC18F67J10-I/PT Microchip Technology, PIC18F67J10-I/PT Datasheet - Page 100

• Manufacturer Part Number: PIC18F67J10-I/PT
• Description: IC PIC MCU FLASH 64KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J10-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 11
• Height: 1 mm
• Length: 10 mm
• Supply Voltage (max): 2.7 V, 3.6 V
• Supply Voltage (min): 2 V, 2.7 V
• Width: 10 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J10
7.6.4
The presentation of control signals on the external
memory bus is different for the various operating
modes. Typical signal timing diagrams are shown in
Figure 7-4 and Figure 7-5.
FIGURE 7-4:
FIGURE 7-5:
DS39663D-page 98
Instruction
AD<15:0>
AD<15:0>
A<19:16>
Execution
A<19:16>
Memory
Instruction
Execution
Memory
Cycle
Cycle
ALE
ALE
CE
OE
CE
OE
16-BIT MODE TIMING
Q1
Q1
3AAAh
EXTERNAL MEMORY BUS TIMING FOR TBLRD (EXTENDED
MICROCONTROLLER MODE)
EXTERNAL MEMORY BUS TIMING FOR SLEEP (EXTENDED
MICROCONTROLLER MODE)
Opcode Fetch
from 000100h
INST(PC – 2)
Opcode Fetch
from 007554h
INST(PC – 2)
TBLRD *
Q2
Q2
SLEEP
00h
Q3
Q3
0003h
Q4
Q4
Q1
Q1
3AABh
TBLRD Cycle 1
Opcode Fetch
from 000102h
Opcode Fetch
from 007556h
MOVLW 55h
MOVLW 55h
Q2
Q2
SLEEP
Preliminary
00h
Q3
Q3
0E55h
Q4
Q4
Q1
Q1
CF33h
TBLRD Cycle 2
from 199E67h
TBLRD 92h
Q2
0Ch
Q3
Sleep Mode,
9256h
Q4
© 2006 Microchip Technology Inc.
Q1
Bus Inactive
Opcode Fetch
from 000104h
ADDLW 55h
Q2
MOVLW
Q3
Q4