TMP86xy49UG/F/NG Toshiba, TMP86xy49UG/F/NG Datasheet - Page 26

• Manufacturer Part Number: TMP86xy49UG/F/NG
• Manufacturer: Toshiba

Specifications of TMP86xy49UG/F/NG

• Package: LQFP64/QFP64/SDIP64
• Rom Types (m=mask,p=otp,f=flash): M/P/F
• Rom Size: 16/32/60
• Ram Size: 512/1K/2K
• Driver Led: 13
• Driver Lcd: -
• Spi/sio Channels: 2
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 56
• Power Supply (v): 4.5 to 5.5

2. Operational Description
2.1 CPU Core Functions
2.1.1 Memory Address Map
2.1.2 Program Memory (OTP)
The CPU core consists of a CPU, a system clock controller, and an interrupt controller.
This section provides a description of the CPU core, the program memory, the data memory, and the reset circuit.
tion register). They are all mapped in 64-Kbyte address space. Figure 2-1 shows the
address map.
The TMP86PM49UG memory is composed OTP, RAM, DBR(Data buffer register) and SFR(Special func-
The TMP86PM49UG has a 32768 bytes (Address 8000H to FFFFH) of program memory (OTP ).
RAM
DBR
OTP
SFR
FFBF
FFC0
FFDF
FFB0
FFE0
FFFF
0FFF
003F
043F
0F80
0000
0040
8000
H
H
H
H
H
H
H
H
H
H
H
H
H
Figure 2-1 Memory Address Map
64 bytes
32768
bytes
bytes
bytes
1024
128
Page 9
Vector table for interrupts
(16 bytes)
Vector table for vector call instructions
(32 bytes)
Vector table for interrupts
(32 bytes)
RAM:
DBR:
OTP:
SFR:
Special function register includes:
I/O ports
Peripheral control registers
Peripheral status registers
System control registers
Program status word
Random access memory includes:
Data memory
Stack
Data buffer register includes:
Peripheral control registers
Peripheral status registers
Program memory
TMP86PM49UG
TMP86PM49UG
memory