TMP86xy49UG/F/NG Toshiba, TMP86xy49UG/F/NG Datasheet - Page 101

• Manufacturer Part Number: TMP86xy49UG/F/NG
• Manufacturer: Toshiba

Specifications of TMP86xy49UG/F/NG

• Package: LQFP64/QFP64/SDIP64
• Rom Types (m=mask,p=otp,f=flash): M/P/F
• Rom Size: 16/32/60
• Ram Size: 512/1K/2K
• Driver Led: 13
• Driver Lcd: -
• Spi/sio Channels: 2
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 56
• Power Supply (v): 4.5 to 5.5

8.3 Function
TC1 pin Input
Up-counter
TC1DRA
INTTC1
interrput request
8.3.3 Event Counter Mode
rising or falling edge of the input pulse is selected as the count up edge in TC1CR<TC1S>.
and the up-counter is cleared. After being cleared, the up-counter restarts counting at each edge of the input
pulse to the TC1 pin. Since a match between the up-counter and the value set to TC1DRA is detected at the
edge opposite to the selected edge, an INTTC1 interrupt request is generated after a match of the value at the
edge opposite to the selected edge.
Use the auto-capture function in the operative condition of TC1. A captured value may not be fixed if it's read
after the execution of the timer stop or auto-capture disable. Read the capture value in a capture enabled condi-
tion. Since the up-counter value is captured into TC1DRB by the source clock of up-counter after setting
TC1CR<ACAP1> to "1". Therefore, to read the captured value, wait at least one cycle of the internal source
clock before reading TC1DRB for the first time.
In the event counter mode, the up-counter counts up at the edge of the input pulse to the TC1 pin. Either the
When a match between the up-counter and the TC1DRA value is detected, an INTTC1 interrupt is generated
Two or more machine cycles are required for the low-or high-level pulse input to the TC1 pin.
Setting TC1CR<ACAP1> to “1” captures the up-counter value into TC1DRB with the auto capture function.
?
Table 8-2 Input Pulse Width to TC1 Pin
Timer start
High-going
Low-going
0
n
Figure 8-4 Event Counter Mode Timing Chart
1
NORMAL1/2, IDLE1/2 Mode
2
2
2
3
3
Page 84
/fc
/fc
Minimum Pulse Width [s]
Match detect
n − 1
SLOW1/2, SLEEP1/2 Mode
n
0
Counter clear
2
2
3
3
/fs
/fs
1
2
TMP86PM49UG
(TC1S = 10)
At the
rising edge