TMP86xy49UG/F/NG Toshiba, TMP86xy49UG/F/NG Datasheet - Page 130
TMP86xy49UG/F/NG
Manufacturer Part Number
TMP86xy49UG/F/NG
Description
Manufacturer
Toshiba
Datasheet
1.TMP86XY49UGFNG.pdf
(263 pages)
Specifications of TMP86xy49UG/F/NG
Package
LQFP64/QFP64/SDIP64
Rom Types (m=mask,p=otp,f=flash)
M/P/F
Rom Size
16/32/60
Ram Size
512/1K/2K
Driver Led
13
Driver Lcd
-
Spi/sio Channels
2
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
56
Power Supply (v)
4.5 to 5.5
- Current page: 130 of 263
- Download datasheet (3Mb)
Example :Generating a pulse with 1-ms high-level width and a period of 32.768 ms (fc = 16.0 MHz)
Table 10-7 16-Bit PWM Output Mode
DV7CK = 0
NORMAL1/2, IDLE1/2 mode
fc/2
fc/2
fc/2
fc/2
fc/2
fs
fc
11
7
5
3
Note 3: To enter the STOP mode, stop the timer and then enter the STOP mode. If the STOP mode is entered with-
CLR (TC4CR).3: Stops the timer.
CLR (TC4CR).7 : Sets the
out stopping of the timer when fc, fc/2 or fs is selected as the source clock, a pulse is output from the
pin during the warm-up period time after exiting the STOP mode.
Source Clock
DV7CK = 1
fs/2
fc/2
fc/2
fc/2
fc/2
3
fs
fc
[Hz]
7
5
3
LDW
LD
LD
LD
Setting ports
(PWREG3), 07D0H
(TC3CR), 33H
(TC4CR), 056H
(TC4CR), 05EH
SLOW1/2,
SLEEP1/2
fs/2
mode
3
fs
–
–
–
–
–
[Hz]
PWM
4 pin to the high level.
Page 113
fc = 16 MHz
30.5 µs
62.5 ns
128 µs
500 ns
125 ns
8 µs
2 µs
: Sets the operating clock to fc/2
: Sets TFF4 to the initial value 0, and 16-bit PWM signal
: Sets the pulse width.
: Starts the timer.
mode (lower byte).
generation mode (upper byte).
Resolution
fs = 32.768 kHz
244.14 µs
30.5 µs
–
–
–
–
–
3
fc = 16 MHz
, and 16-bit PWM output
524.3 ms
131.1 ms
32.8 ms
8.2 ms
4.1 ms
8.39 s
2 s
Repeated Cycle
TMP86PM49UG
fs = 32.768 kHz
16 s
2 s
PWM
–
–
–
–
–
4
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