TMP86xy49UG/F/NG Toshiba, TMP86xy49UG/F/NG Datasheet - Page 104

• Manufacturer Part Number: TMP86xy49UG/F/NG
• Manufacturer: Toshiba

Specifications of TMP86xy49UG/F/NG

• Package: LQFP64/QFP64/SDIP64
• Rom Types (m=mask,p=otp,f=flash): M/P/F
• Rom Size: 16/32/60
• Ram Size: 512/1K/2K
• Driver Led: 13
• Driver Lcd: -
• Spi/sio Channels: 2
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 56
• Power Supply (v): 4.5 to 5.5

Example :Duty measurement (resolution fc/2
PINTTC1:
SINTTC1:
VINTTC1:
TC1 pin
INTTC1 interrupt request
INTTC1SW
CLR
LD
DI
SET
EI
LD
CPL
JRS
LD
LD
LD
RETI
LD
LD
LD
RETI
:
DW
:
:
(INTTC1SW). 0
(TC1CR), 00000110B
(EIRL). 5
(TC1CR), 00100110B
(INTTC1SW). 0
F, SINTTC1
A, (TC1DRBL)
W,(TC1DRBH)
(HPULSE), WA
A, (TC1DRBL)
W,(TC1DRBH)
(WIDTH), WA
PINTTC1
7
[Hz])
HPULSE
Page 87
WIDTH
; INTTC1 service switch initial setting
; Sets the TC1 mode and source clock
; IMF= “1”
; Starts TC1 with an external trigger at MCAP1 = 0
; Reads TC1DRB (High-level pulse width)
; Stores high-level pulse width in RAM
; Stores cycle in RAM
; Duty calculation
; IMF= “0”
; Enables INTTC1
; INTTC1 interrupt, inverts and tests INTTC1 service switch
; Reads TC1DRB (Cycle)
; INTTC1 Interrupt vector
Address set to convert INTTC1SW at each INTTC1
TMP86PM49UG