TMP86xy49UG/F/NG Toshiba, TMP86xy49UG/F/NG Datasheet - Page 119

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TMP86xy49UG/F/NG

Manufacturer Part Number
TMP86xy49UG/F/NG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP86xy49UG/F/NG

Package
LQFP64/QFP64/SDIP64
Rom Types (m=mask,p=otp,f=flash)
M/P/F
Rom Size
16/32/60
Ram Size
512/1K/2K
Driver Led
13
Driver Lcd
-
Spi/sio Channels
2
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
56
Power Supply (v)
4.5 to 5.5
10.1 Configuration
TimerCounter 4 Timer Register
TimerCounter 4 Control Register
PWREG4
TTREG4
(0015H)
(0019H)
(0028H)
TC4CR
(TTREG4 and PWREG4).
R/W
R/W
The TimerCounter 4 is controlled by the TimerCounter 4 control register (TC4CR) and two 8-bit timer registers
Note 1: Do not change the timer register (TTREG4) setting while the timer is running.
Note 2: Do not change the timer register (PWREG4) setting in the operating mode except the 8-bit and 16-bit PWM modes while
Note 1: fc: High-frequency clock [Hz] fs: Low-frequency clock [Hz]
Note 2: Do not change the TC4M, TC4CK and TFF4 settings while the timer is running.
Note 3: To stop the timer operation (TC4S= 1 → 0), do not change the TC4M, TC4CK and TFF4 settings.
Note 4: When TC4M= 1** (upper byte in the 16-bit mode), the source clock becomes the TC3 overflow signal regardless of the
Note 5: To use the TimerCounter in the 16-bit mode, select the operating mode by programming TC4M, where TC3CR<TC3M>
TC4CK
TC4M
TC4S
TFF4
the timer is running.
To start the timer operation (TC4S= 0 → 1), TC4M, TC4CK and TFF4 can be programmed.
TC4CK setting.
must be set to 011.
TFF4
7
7
7
Timer F/F4 control
Operating clock selection [Hz]
TC4 start control
TC4M operating mode select
6
6
6
TC4CK
5
5
5
4
4
4
000:
001:
010:
011:
100:
101:
110:
111:
TC4S
0:
1:
0:
1:
3
3
3
000
001
010
100
101
011
110
111
Clear
Set
Operation stop and counter clear
Operation start
8-bit timer/event counter mode
8-bit programmable divider output (PDO) mode
8-bit pulse width modulation (PWM) output mode
Reserved
16-bit timer/event counter mode
Warm-up counter mode
16-bit pulse width modulation (PWM) output mode
16-bit PPG mode
2
2
2
Page 102
DV7CK = 0
TC4M
NORMAL1/2, IDLE1/2 mode
1
1
1
fc/2
fc/2
fc/2
fc/2
fc/2
fs
fc
11
7
5
3
0
0
0
(Initial value: 1111 1111)
(Initial value: 1111 1111)
(Initial value: 0000 0000)
TC4 pin input
DV7CK = 1
fs/2
fc/2
fc/2
fc/2
fc/2
fs
fc
3
7
5
3
SLEEP1/2
SLOW1/2
mode
fs/2
fs
3
TMP86PM49UG
R/W
R/W
R/W
R/W

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