PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 791

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
Figure 2:
Figure 3:
memory address A
Indexed Formats
16-Bit Pixel-Packed Formats
memory address A
left-most pixel (group)
left-most pixel
3.2 16-Bit Pixel-Packed Formats
3.3 32-Bit Pixel-Packed Formats
Indexed formats are accepted by the QVCP and MBS. The 2D Drawing Engine
supports 8 bpp indexed as a frame buffer format, but supports no other indexed
variants.
The 16-bit native formats are RGBa 4444, RGBa 4534 and RGB 565.
Figure 3
always the same when performing 16-bit load/store instructions, regardless of system
endian mode. Adjacent pixels have left-to-right increasing memory addresses.
16-bit formats are accepted and produced by the QVCP, VIP, MBS and the 2D
Drawing Engine.
The 32-bit formats include RGBa 8888 and YUVa 4:4:4 with an 8-bit per pixel alpha.
Figure 4
This view is independent of system endian mode. Left-to-right pixels have increasing
memory addresses.
shows the “software view” of these formats. The CPU register layout is
shows the “software view,” resulting from a 32-bit load into a CPU register.
memory address A+1
next pixel (group)
Rev. 4.0 — 03 December 2007
15
15
15
memory address A+2
alpha
alpha
R
. . . . . .
12 11
12 11
11
10
R
R
next pixel
7
i1
7
7
7
memory address A+k
16 bit
i1
right-most pixel (group)
i2 i3 i4 i5 i6 i7 i8
8
G
i1
7
7
PNX15xx/952x Series
i2
1 byte
6
G
i
G
5
i3
Chapter 28: Pixel Formats
4
4
4
i2
3
3
i4
B
0
0
0
0
B
1 bpp index
2 bpp index
4 bpp index
8 bpp index
B
© NXP B.V. 2007. All rights reserved.
0
0
0
RGBa 4444
RGBa 4534
RGB 565
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