PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 478

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
Table 3: Fast general purpose output (FGPO)
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bit
14
13
12
11
10
9:8
Symbol
POLARITY_CLK
OUTPUT_ENABLE_2
OUTPUT_ENABLE_1
MODE
Reserved
SAMPLE_SIZE
Acces
s
R/W
R/W
R/W
R/W
R
R/W
Value
0
0
0
0
0
00
Rev. 4.0 — 03 December 2007
…Continued
Description
Externally selects active clock edge for clk_fgpo via fgpo_clk_pol
Note: This bit not used in the PNX15xx/952x Series. All FGPO
clock control is in the clock module.
Enable output from buffer 2. This bit, along with bit 12 below, start
and stop FGPO DMA activity.
Enable output from buffer 1. This bit, along with bit 13 above, start
and stop FGPO DMA activity. If output from only one buffer is
desired, this bit must be used to start/stop DMA.
0 = record mode
1 = message mode
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
Encodes size of data samples output on fgpo_data:
00 = 8-bit data samples
01 = 16-bit data samples
10 = 32-bit data samples
11 = same as 10 above
0 = rising edge
1 = falling edge
Chapter 13: FGPO: Fast General Purpose Output
PNX15xx/952x Series
© NXP B.V. 2007. All rights reserved.
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