MC68EC020AA25 Freescale Semiconductor, MC68EC020AA25 Datasheet - Page 272

• Manufacturer Part Number: MC68EC020AA25
• Description: IC MPU 32BIT 25MHZ 100-QFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC020AA25

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

9.8 ACCESS LEVELS
The MC68020/EC020 module mechanism supports a finer level of access control beyond
the distinction between user and supervisor privilege levels. The module mechanism
allows a module with limited access rights to call a module with greater access rights. With
the help of external hardware, the processor can verify that an increase in access rights is
allowable or can detect attempts by a module to gain access rights to which it is not
entitled.
Type $01 module descriptors and module stack frames indicate a request to change
access levels. While processing a type $01 descriptor or frame, the CALLM and RTM
instructions communicate with external access control hardware via accesses in the CPU
space. For these accesses, A19–A16 equal 0001. Figure 9-13 shows the address map for
these CPU space accesses. If the processor receives a bus error on any of these CPU
space accesses during the execution of a CALLM or RTM instruction, the processor will
take a format error exception.
The current access level register (CAL) contains the access level rights of the currently
executing module. The increase access level register (IAL) is the register through which
the processor requests increased access rights. The decrease access level register (DAL)
is the register through which the processor requests decreased access rights. The formats
of these three registers are undefined to the main processor, but the main processor
assumes that information read from the module descriptor stack frame or the CAL can be
meaningfully written to the IAL or the DAL. The access status register allows the
processor to query the external hardware as to the legality of intended access level
transitions. Table 9-6 lists the valid values of the access status register.
9-18
$0C
$4C
$5C
$00
$04
$08
$40
$44
$48
$50
$54
$58
31
ACCESS STATUS REGISTER
CAL
DAL
IAL
Figure 9-13. Access Level Control Bus Registers
FUNCTION CODE 5 DESCRIPTOR ADDRESS (SUPERVISOR PROGRAM)
24
FUNCTION CODE 4 DESCRIPTOR ADDRESS (SUPERVISOR DATA)
FUNCTION CODE 2 DESCRIPTOR ADDRESS (USER PROGRAM)
23
FUNCTION CODE 1 DESCRIPTOR ADDRESS (USER DATA)
FUNCTION CODE 7 DESCRIPTOR ADDRESS (CPU SPACE)
FUNCTION CODE 0 DESCRIPTOR ADDRESS
FUNCTION CODE 3 DESCRIPTOR ADDRESS
FUNCTION CODE 6 DESCRIPTOR ADDRESS
M68020 USER’S MANUAL
(UNUSED, RESERVED)
(UNUSED, RESERVED)
(UNUSED, RESERVED)
(UNUSED, RESERVED)
MOTOROLA
0