MC68EC020AA25 Freescale Semiconductor, MC68EC020AA25 Datasheet - Page 14

• Manufacturer Part Number: MC68EC020AA25
• Description: IC MPU 32BIT 25MHZ 100-QFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC020AA25

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

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1-1
1-2
2-1
3-1
3-2
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
6-1
6-2
6-3
6-4
6-5
7-1
7-2
7-3
7-4
7-5
7-6
8-1
8-2
8-3
xviii
Number
Table
Addressing Modes ........................................................................................... 1-9
Instruction Set .................................................................................................. 1-11
Address Space Encodings ............................................................................... 2-4
Signal Index ..................................................................................................... 3-3
Signal Summary............................................................................................... 3-8
DSACK1/DSACK0 Encodings and Results .................................................... 5-5
SIZ1, SIZ0 Signal Encoding ............................................................................. 5-7
Address Offset Encodings ............................................................................... 5-7
Data Bus Requirements for Read Cycles ........................................................ 5-8
MC68020/EC020 Internal to External Data Bus Multiplexer—
Memory Alignment and Port Size Influence on Read/Write Bus Cycles .......... 5-20
Data Bus Byte Enable Signals for Byte, Word, and Long-Word Ports ............. 5-22
DSACK1/DSACK0, BERR, HALT Assertion Results ..................................... 5-54
Exception Vector Assignments ........................................................................ 6-3
Tracing Control ................................................................................................ 6-9
Interrupt Levels and Mask Values.................................................................... 6-12
Exception Priority Groups ................................................................................ 6-18
Exception Stack Frames .................................................................................. 6-26
cpTRAPcc Opmode Encodings........................................................................ 7-16
Coprocessor Format Word Encodings ............................................................. 7-18
Null Coprocessor Response Primitive Encodings............................................ 7-32
Valid Effective Address Field Codes ................................................................ 7-36
Main Processor Control Register Select Codes............................................... 7-41
Exceptions Related to Primitive Processing .................................................... 7-53
Examples 1–4 Instruction Stream Execution Comparison ............................... 8-8
Instruction Timings from Timing Tables ........................................................... 8-11
Observed Instruction Timings .......................................................................... 8-11
Write Cycles ................................................................................................... 5-9
SECTION 1: OVERVIEW
LIST OF TABLES
M68020 USER’S MANUAL
Title
UM Rev.1.0
MOTOROLA
Number
Page