MC68EC020AA25 Freescale Semiconductor, MC68EC020AA25 Datasheet - Page 248

IC MPU 32BIT 25MHZ 100-QFP

MC68EC020AA25

Manufacturer Part Number
MC68EC020AA25
Description
IC MPU 32BIT 25MHZ 100-QFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68EC020AA25

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
100-QFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68EC020AA25
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MC68EC020AA25
Quantity:
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Part Number:
MC68EC020AA25
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Part Number:
MC68EC020AA25R
Manufacturer:
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Quantity:
10 000
8.2.12 Shift/Rotate Instructions
The shift/rotate instructions table indicates the number of clock periods needed for the
processor to perform the specified operation on the given addressing mode. Footnotes
indicate when it is necessary to add another table entry to calculate the total effective
execution time for the instruction. The number of bits shifted does not affect execution
time. The total number of clock cycles is outside the parentheses, the number of read,
prefetch, and write cycles is given inside the parentheses as (r/p/w). These cycles are
included in the total clock cycle number.
*
d—Direction of Shift/Rotate, L or R
8-34
*
*
*
*
*
*
*
Add Fetch Effective Address Time
LSL
LSR
LSL
LSR
LSL
LSR
ASL
ASR
ASL
ASR
ROL
ROR
ROL
ROR
ROXL
ROXR
ROXd
Instruction
Dn (Static)
Dn (Static)
Dn (Dynamic)
Dn (Dynamic)
Mem by 1
Mem by 1
Dn
Dn
Mem by 1
Mem by 1
Dn
Dn
Mem by 1
Mem by 1
Dn
Dn
Mem by 1
M68020 USER’S MANUAL
Best Case
1(0/0/0)
1(0/0/0)
3(0/0/0)
3(0/0/0)
5(0/0/1)
5(0/0/1)
5(0/0/0)
3(0/0/0)
6(0/0/1)
5(0/0/1)
5(0/0/0)
5(0/0/0)
7(0/0/1)
7(0/0/1)
9(0/0/0)
9(0/0/0)
5(0/0/1)
Cache Case
12(0/0/0)
12(0/0/0)
4(0/0/0)
4(0/0/0)
6(0/0/0)
6(0/0/0)
5(0/0/1)
5(0/0/1)
8(0/0/0)
6(0/0/0)
6(0/0/1)
5(0/0/1)
8(0/0/0)
8(0/0/0)
7(0/0/1)
7(0/0/1)
5(0/0/1)
Worst Case
12(0/1/0)
12(0/1/0)
4(0/1/0)
4(0/1/0)
6(0/1/0)
6(0/1/0)
6(0/1/1)
6(0/1/1)
8(0/1/0)
6(0/1/0)
7(0/1/1)
6(0/1/1)
8(0/1/0)
8(0/1/0)
7(0/1/1)
7(0/1/1)
6(0/1/1)
MOTOROLA

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