Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 89
Z16F2800100ZCOG
Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr
Datasheets
1.Z16F2800100ZCOG.pdf
(2 pages)
2.Z16F2800100ZCOG.pdf
(30 pages)
3.Z16F2800100ZCOG.pdf
(388 pages)
Specifications of Z16F2800100ZCOG
Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
- Current page: 89 of 388
- Download datasheet (22Mb)
Table 27. Port A-K Data Direction Registers (PxDD)
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
Port A-K Data Direction Registers
FF_E102, FF_E112, FF_E122, FF_E132, FF_E142, FF_E152, FF_E162, FF_E172, FF_E182,
DD7
R/W
7
1
POUT[7:0]—Port Output Data
These bits contain the data to be driven out from the port pins. The values are only driven if
the corresponding pin is configured as an output and the pin is not configured for alternate
function operation.
0 = Drive a logical 0 (Low).
1= Drive a logical 1 (High). High value is not driven if the drain has been disabled by setting
the corresponding port output control register bit to 1.
The Port A-K data direction registers (see
either inputs or outputs.
DD[7:0]—Data Direction
These bits control the direction of the associated port pin. Port alternate function operation
overrides the data direction register setting.
0 = Output
Data in the Port A-K output data register is driven onto the port pin.
1 = Input
The port pin is sampled and the value written into the Port A-K input data register. The
output driver is high impedance.
DD6
R/W
6
1
DD5
R/W
5
1
P R E L I M I N A R Y
DD4
R/W
4
1
FF_E192
Table
DD3
R/W
3
27) configure the specified port pins as
1
DD2
R/W
2
1
General-Purpose Input/Output
Product Specification
ZNEO
DD1
R/W
1
1
Z16F Series
DD0
R/W
0
1
74
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