Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 338

DEV KIT FOR Z16F ZNEO

Z16F2800100ZCOG

Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr

Specifications of Z16F2800100ZCOG

Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
Table 174. OCD Status Register (OCDSTAT)
PS022008-0810
BITS
FIELD
RESET
R/W
OCD Status Register
DBGHALT DBGBRK
BRKHALT bit is set. 
0 = The device is running.
1 = The device is in Debug Halt mode.
BRKHALT—Breakpoint halt
This bit determines what action the OCD takes when a Breakpoint occurs. If this bit is set
to one, then the DBGHALT bit is automatically set to one when a breakpoint occurs. If
BRKHALT is zero, then the CPU will loop on the breakpoint.
0 = CPU loops on current instruction when breakpoint occurs.
1 = A Breakpoint sets DBGHALT to one.
BRKEN—Enable breakpoints
This bit controls the behavior of the
default, these generate an illegal instruction system trap. If this bit is set to one, these
events generate a Breakpoint instead of a system trap. The resulting action depends upon
the BRKHALT bit. 
0 =
1 =
DBGSTOP—Debug Stop mode
This bit controls the system clock behavior in STOP mode. When set to one, the system
clock will continue to operate in STOP mode.
0 = Stop mode debug disabled. system clock stops in STOP mode.
1 = Stop mode debug enabled. system clock runs in STOP mode.
Reserved
This bit is reserved and must be written to zero.
STEP—Single step an instruction
This bit is used to single step an instruction when in Debug Halt Mode. This bit is auto-
matically cleared after an instruction is executed.
0 = Idle
1 = Single Step an Instruction.
The
the system.
R
7
0
BRK
BRK
OCD Status Register (OCDSTAT)
instruction and hardware breakpoint generates system trap. 
instruction and hardware breakpoint generates a breakpoint.
R
6
0
HALT
R
5
0
P R E L I M I N A R Y
STOP
BRK
R
4
0
reports status information about the current state of
instruction and the hardware breakpoint. By
RPEN
3
R
0
Reserved
R
2
0
Product Specification
ZNEO
TDRF
On-Chip Debugger
R
1
0
Z16F Series
RDRE
R
0
1
322

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