Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 202
Z16F2800100ZCOG
Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr
Datasheets
1.Z16F2800100ZCOG.pdf
(2 pages)
2.Z16F2800100ZCOG.pdf
(30 pages)
3.Z16F2800100ZCOG.pdf
(388 pages)
Specifications of Z16F2800100ZCOG
Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
- Current page: 202 of 388
- Download datasheet (22Mb)
PS022008-0810
Figure 40. ESPI Configured as an SPI Master in a Single Master and Multiple Slave System
Figure 39. ESPI Configured as an SPI Master in a Single Master and Single Slave System
To Slave #2’s SS Pin
To Slave #1’s SS Pin
To Slave’s SS Pin
configured for the ESPI alternate function on the MOSI, MISO, and SCK pins. The GPIO
for the ESPI SS pin is configured in alternate function mode as well though software uses
any GPIO pin(s) to drive one or more slave select lines. If the ESPI SS signal is not used to
drive a slave select the SSIO bit must still be set to 1 in a single master system.
and
From Slave
Figure 40
From Slaves
To Slave
To Slave
To Slaves
To Slaves
displays the ESPI block configured as an SPI master.
MISO
MOSI
SCK
SS
MISO
MOSI
SCK
GPIO
GPIO
P R E L I M I N A R Y
Bit 0
Bit 0
8-bit Shift Register
8-bit Shift Register
ESPI Master
ESPI Master
Bit 7
Bit 7
Baud Rate
Baud Rate
Generator
Generator
Enhanced Serial Peripheral Interface
Product Specification
ZNEO
Z16F Series
Figure 39
186
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