Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 360

DEV KIT FOR Z16F ZNEO

Z16F2800100ZCOG

Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr

Specifications of Z16F2800100ZCOG

Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
PS022008-0810
Table 184. POR and VBO Electrical Characteristics and Timing (Continued)
Table 185. Reset and Stop Mode Recovery Pin Timing
Symbol Parameter
T
T
T
T
I
Note
Symbol Parameter
T
T
CC
ANA
POR
VBO
RAMP
RESET
SMR
1. Data in the typical column is from characterization at 3.3 V and 0 °C. These values are provided for design
guidance only and are not tested in production.
Power-on reset analog
delay
Power-on reset digital
delay
Voltage Brownout pulse
rejection period
Time for V
from V
ensure valid Reset
Supply current
RESET pin assertion to
initiate a System Reset
Stop Mode Recovery
pin Pulse Rejection
Period
SS
to V
DD
to transition
POR
to
Min
0.10
10
T
Min
4
T
A
A
= –40 °C to 125 °C
P R E L I M I N A R Y
= –40 °C to 125 °C
Typ
20
Typ
500
50
12
10
1
Max
40
Max
100
Units Conditions
T
Units Conditions
ns
CLK
ms
ms
ms
µA
us
Not in STOP Mode.
T
RESET, DBG, and GPIO pins
configured as SMR sources.
V
Reset delay follows T
66 IPO cycles
V
Reset
V
CLK
DD
DD
DD
Product Specification
= System Clock period.
> V
< V
= 3.3 V.
Electrical Characteristics
ZNEO
POR
VBO
; T
to generate a
POR
Z16F Series
Digital
ANA
344

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