AD9915 AD [Analog Devices], AD9915 Datasheet - Page 4

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AD9915

Manufacturer Part Number
AD9915
Description
2.5 GSPS Direct Digital Synthesizer with 12-Bit DAC
Manufacturer
AD [Analog Devices]
Datasheet

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SPECIFICATIONS
DC SPECIFICATIONS
AVDD (1.8V) and DVDD (1.8V) = 1.8 V ± 5%, AVDD (3.3V) and DVDD_I/O (3.3V) = 3.3 V ± 5%, T
I
Table 1.
Parameter
SUPPLY VOLTAGE
SUPPLY CURRENT
TOTAL POWER DISSIPATION
CMOS LOGIC INPUTS
CMOS LOGIC OUTPUTS
REF CLK INPUT CHARACTERISTICS
AD9915
OUT
I
Base DDS Power, PLL Disabled
Base DDS Power, PLL Enabled
Linear Sweep Additional Power
Modulus Additional Power
Amplitude Scaler Additional
Full Power-Down Mode
Maximum Input Capacitance (C
DVDD_I/O
DVDD
AVDD (3.3V)
AVDD (1.8V)
I
I
I
Input High Voltage (V
Input Low Voltage (V
Input Current (I
Output High Voltage (V
Output High Voltage (V
REF CLK Multiplier Bypassed
REF CLK Multiplier Enabled
AVDD(1.8V)
DVDD_I/O
DVDD
AVDD(3.3V)
= 20 mA, external reference clock frequency = 2.5 GHz with reference clock (REF CLK) multiplier bypassed, unless otherwise noted.
Power
Input Capacitance
Input Resistance
Internally Generated DC Bias
Input Capacitance
Input Resistance
Internally Generated DC Bias
Differential Input Voltage
Differential Input Voltage
Voltage
Voltage
INH
, I
INL
IL
)
IH
)
)
OH
OL
)
)
IN
)
Min
3.135
1.71
3.135
1.71
2.0
2.7
Typ
3.30
1.80
3.30
1.80
2138
2237
28
20
138
400
±60
3
1
1.4
2
0.8
1
1.4
2
0.8
Max
3.465
1.89
3.465
1.89
20
270
640
148
2797
2890
616
DVDD_I/O
0.8
±200
DVDD_I/O
0.4
1.5
1.5
Rev. A | Page 4 of 48
Unit
V
V
V
V
mA
mA
mA
mA
mW
mW
mW
mW
mW
mW
V
V
μA
pF
V
V
pF
V
V p-p
pF
V
V p-p
Test Conditions/Comments
Pin 16, Pin 83
Pin 6, Pin 23, Pin 73
Pin 34, Pin 36, Pin 39, Pin 40, Pin 43, Pin 47, Pin 50, Pin 52,
Pin 53, Pin 60
Pin 32, Pin 56, Pin 57
See also the total power dissipation specifications
Pin 16, Pin 83
Pin 6, Pin 23, Pin 73
Pin 34, Pin 36, Pin 39, Pin 40, Pin 43, Pin 47, Pin 50, Pin 52,
Pin 53, Pin 60
Pin 32, Pin 56, Pin 57
2.5 GHz, single-tone mode, modules disabled, linear
sweep disabled, amplitude scaler disabled
2.5 GHz, single-tone mode, modules disabled, linear
sweep disabled, amplitude scaler disabled
Manual or automatic
Using either the power-down and enable register or the
EXT_PWR_DWN pin
At V
I
I
REF CLK inputs should always be ac-coupled (both single-
ended and differential)
Single-ended, each pin
Differential
Single-ended, each pin
Differential
OH
OL
= 1 mA
= 1 mA
IN
= 0 V and V
IN
= DVDD_I/O
A
= 25°C, R
SET
= 3.3 kΩ,
Data Sheet

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