AD9915 AD [Analog Devices], AD9915 Datasheet - Page 18

• Manufacturer Part Number: AD9915
• Description: 2.5 GSPS Direct Digital Synthesizer with 12-Bit DAC
• Manufacturer: AD [Analog Devices]

This equation implies a modulus of B × 2
the case of a standard DDS). Furthermore, because B is
programmable, the result is a DDS with a programmable
modulus.
When in programmable modulus mode, the 32-bit auxiliary
accumulator operates in a way that allows it to roll over at a
value other than its full capacity of 2
modified modulus based on the programmable value of B. With
each roll over of the auxiliary accumulator, a value of 1 LSB
adds to the current accumulated value of the 32-bit phase
accumulator. This behavior changes the modulus of the phase
accumulator to B × 2
the desired f
To determine the programmable modulus mode register values
for FTW, A, and B, the user must first define f
relatively prime integers, M/N. That is, having converted f
f
terms. Then, divide M × 2
division operation is the value of FTW (Register 0x04[31:0]).
The remainder, Y, of this division operation is
The value of Y facilitates the determination of A and B by
taking the fraction, Y/N, and reducing it to its lowest terms.
Then, the numerator of the reduced fraction is A (Register
0x06[31:0]) and the denominator is the B (Register 0x05[31:0]).
For example, synthesizing precisely 300 MHz with a 1 GHz
system clock is not possible with a standard DDS. It is possible,
however, using programmable modulus as follows.
Table 6. Data Source Priority
Priority
Highest
Lowest
AD9915
S
to integers, M and N, reduce the fraction, M/N, to its lowest
Priority
Priority
Y = (2
32
0
.
× M) – (FTW × N)
Data Source
Programmable
modulus
DRG
Profiles
Parallel port
32
(instead of 2
32
by N. The integer part of this
Conditions
If programmable modulus mode is used to output frequency only, no other data source can be used to
control the output frequency in this mode. Note that the DRG is used in conjunction with programmable
modulus mode; therefore, the DRG cannot be used to sweep phase or amplitude in programmable
modulus mode.
If output phase offset control is desired, enable profile mode and use the profile registers and profile
pins accordingly to control output phase adjustment.
If output amplitude control is desired, enable profile mode and use the profile registers and profile pins
accordingly to control output amplitude adjustment. Note that the OSK enable bit must be set to control
the output amplitude.
The digital ramp modulation mode is the next highest priority mode. If the DRG is enabled to sweep
output frequency, phase, or amplitude, the two parameters not being swept can be controlled
independently via the profile mode.
The profile modulation mode is the next highest priority mode. Profile mode can be used to control all
three parameters independently, if desired.
Parallel data port modulation has the lowest priority but the most flexibility as far as changing any
parameter at the high rate. See the Programming and Function pins section.
32
32
), allowing it to synthesize
. That is, it operates with a
32
(rather than 2
0
/f
S
as a ratio of
32
0
, in
and
Rev. A | Page 18 of 48
DDS Signal Control Parameters
First, express f
Reducing this fraction to lowest terms yields 3/10; therefore,
M = 3 and N = 10. FTW is the integer part of (M × 2
(3 × 2
hexadecimal notation). The remainder, Y, of (3 × 2
× 3) − (1,288,490,188 × 10), which is 8. Therefore, Y/N is 8/10,
which reduces to 4/5. Therefore, A = 4 and B = 5 (0x00000004
and 0x00000005 in 32-bit hexadecimal notation, respectively).
Programming the
results in an output frequency that is exactly 3/10 of the system
clock frequency.
MODE PRIORITY
The ability to activate each mode independently makes it
possible to have multiple data sources attempting to drive the
same DDS signal control parameter (frequency, phase, and
amplitude). To avoid contention, the
priority system. Table 6 summarizes the priority for each of the
DDS modes. The data source column in Table 6 lists data sources
for a particular DDS signal control parameter in descending
order of precedence. For example, if the profile mode enable bit
and the parallel data port enable bit (0x01[23:22]) are set to
Logic 1 and both are programmed to source the frequency
tuning word to DDS output, the profile modulation mode has
priority over the parallel data port modulation mode.
300,000,000/1,000,000,000
32
)/10, which is 1,288,490,188 (0x4CCCCCCC in 32-bit
0
/f
S
as a ratio of integers:
AD9915
with these values of FTW, A, and B
AD9915
has a built-in
Data Sheet
32
)/10, is (2
32
)/N, or
32