AMD-K6 AMD [Advanced Micro Devices], AMD-K6 Datasheet - Page 301

• Manufacturer Part Number: AMD-K6
• Description: AMD-K6 Processor
• Manufacturer: AMD [Advanced Micro Devices]

20695H/0—March 1998
Figure 103. SYSCALL/SYSRET Target Address Register (STAR)
24.2
Table 62. Integer Instructions
Chapter 24
SYSCALL
SYSRET
63
Instruction Mnemonic
SYSRET CS Selector and SS
Selector Base
Instructions Supported by the AMD-K6
48
Table 61. SYSCALL/SYSRET Target Address Register (STAR) Definition
This section documents the x86 instructions supported by the
AMD-K6 processor Model 7 that are not supported by AMD-K6
processor Model 6. For information about the remaining x86
instructions supported by the AMD-K6 processor Model 6, see
Chapter 3, “Software Environment” on page 21.
Table 62 shows the instruction mnemonic, opcode, modR/M
by t e , d e c o d e t y p e, a n d R I S C 8 6 o p e ra t i o n ( s ) fo r e a ch
instruction. The first column of the tables indicates the
instruction mnemonic and operand types. The second and third
columns list all applicable opcode bytes. The fourth column
lists the modR/M byte when used by the instruction. The
modR/M byte defines the instruction as a register or memory
form. The fifth column lists the type of instruction decode —
RISC86 operation(s) required for the instruction.
short, long, and vector. The sixth column lists the type of
63–48
47–32
47
31–0
Bit
SYSCALL CS Selector and SS
Selector Base
SYSRET CS and SS Selector Base
SYSCALL CS and SS Selector Base
Target EIP Address
Byte
First
0Fh
0Fh
Software Environment
Second
Byte
05h
07h
Description
32
31
ModR/M
Byte
Decode
vector
vector
Type
Target EIP Address
®
R/W
R/W
R/W
R/W
AMD-K6
Processor
RISC86
Opcodes
®
Processor Data Sheet
®
0
283