AM29F200 AMD [Advanced Micro Devices], AM29F200 Datasheet

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AM29F200

Manufacturer Part Number
AM29F200
Description
2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory
Manufacturer
AMD [Advanced Micro Devices]
Datasheet

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Am29F200B
2 Megabit (256 K x 8-Bit/128 K x 16-Bit)
CMOS 5.0 Volt-only, Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
This Data Sheet states AMD’s current technical specifications regarding the Products described herein. This Data
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
5.0 V
— Minimizes system level power requirements
Manufactured on 0.32 µm process technology
— Compatible with 0.5 µm Am29F200A device
High performance
— Access times as fast as 45 ns
Low power consumption
— 20 mA typical active read current (byte mode)
— 28 mA typical active read current for
— 30 mA typical program/erase current
— 1 A typical standby current
Sector erase architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
— One 8 Kword, two 4 Kword, one 16 Kword, and
— Supports full chip erase
— Sector Protection features:
Top or bottom boot block configurations available
(word mode)
three 64 Kbyte sectors (byte mode)
three 32 Kword sectors (word mode)
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
Sectors can be locked via programming equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
10% for read and write operations
Embedded Algorithms
— Embedded Erase algorithm automatically
— Embedded Program algorithm automatically
Minimum 1,000,000 write/erase cycles guaranteed
20-year data retention at 125 C
— Reliable operation for the life of the system
Package options
— 44-pin SO
— 48-pin TSOP
— Known Good Die (KGD)
Compatible with JEDEC standards
— Pinout and software compatible with
— Superior inadvertent write protection
Data# Polling and Toggle Bit
— Detects program or erase cycle completion
Ready/Busy# output (RY/BY#)
— Hardware method for detection of program or
Erase Suspend/Erase Resume
— Supports reading data from a sector not
Hardware RESET# pin
— Resets internal state machine to the reading
preprograms and erases the entire chip or any
combination of designated sectors
writes and verifies data at specified addresses
(see publication number 21257)
single-power-supply flash
erase cycle completion
being erased
array data
Publication# 21526
Issue Date: July 2, 1999
Rev: B Amendment/+2

Related parts for AM29F200

AM29F200 Summary of contents

Page 1

... DISTINCTIVE CHARACTERISTICS 5.0 V 10% for read and write operations — Minimizes system level power requirements Manufactured on 0.32 µm process technology — Compatible with 0.5 µm Am29F200A device High performance — Access times as fast Low power consumption — typical active read current (byte mode) — ...

Page 2

... GENERAL DESCRIPTION The Am29F200B Mbit, 5.0 Volt-only Flash memory organized as 262,144 bytes or 131,072 words. The 8 bits of data appear on DQ0–DQ7; the 16 bits on DQ0–DQ15. The Am29F200B is offered in 44-pin SO and 48-pin TSOP packages. The device is also avail- able in Known Good Die (KGD) form. For more information, refer to publication number 21257 ...

Page 3

... A0–A16 A-1 5% -45 -50 10 RY/BY# Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer X-Decoder Am29F200B Am29F200B -55 -70 -90 -120 120 120 DQ0–DQ15 Input/Output Buffers Data STB Latch Y-Gating Cell Matrix ...

Page 4

... V SS OE# DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 Am29F200B 44 RESET A10 39 A11 38 A12 37 A13 36 A14 35 A15 34 A16 33 BYTE DQ15/A-1 DQ7 30 29 DQ14 28 DQ6 ...

Page 5

... DQ4 DQ11 DQ3 14 DQ10 15 DQ2 16 DQ9 17 18 DQ1 19 DQ8 20 DQ0 OE CE Standard TSOP Reverse TSOP Am29F200B A16 48 BYTE DQ15/A DQ7 DQ14 43 DQ6 42 DQ13 41 40 DQ5 DQ12 39 DQ4 DQ11 36 DQ3 35 34 DQ10 ...

Page 6

... Hardware reset pin, active low RY/BY# = Ready/Busy output V = +5.0 V single power supply CC (see Product Selector Guide for device speed ratings and voltage supply tolerances Device ground Pin not connected internally 6 LOGIC SYMBOL 17 A0–A16 DQ0–DQ15 CE# OE# WE# RESET# BYTE# Am29F200B (A-1) RY/BY# 21526B-5 ...

Page 7

... Megabit (256 K x 8-Bit128 K x 16-Bit) CMOS Flash Memory 5.0 Volt-only Program and Erase Valid Combinations AM29F200BT-45, EC, EI, FC, FI, SC, SI AM29F200BB-45 AM29F200BT-50, AM29F200BB-50 AM29F200BT-55, AM29F200BB-55 AM29F200BT-70, AM29F200BB-70 AM29F200BT-90, AM29F200BB-90 AM29F200BT-120, AM29F200BB-120 OPTIONAL PROCESSING Blank = Standard Processing B = Burn-In (Contact an AMD representative for more information) TEMPERATURE RANGE ...

Page 8

... The register is composed of latches that store the commands, along with the address and data informa- tion needed to execute the command. The contents of Table 1. Am29F200B Device Bus Operations Operation Read Write CMOS Standby ...

Page 9

... The device IH Output Disable Mode ) for read access When the OE# input disabled. The output pins are placed in the high imped- ance state. Am29F200B represents the CC3 , the device enters IL SS (during Embedded Algorithms). The (not during Embedded Algo- ...

Page 10

... Table 2. Am29F200T Top Boot Block Sector Address Table Sector A16 A15 A14 SA0 SA1 SA2 SA3 SA4 SA5 SA6 Table 3. Am29F200B Bottom Boot Block Sector Address Table Sector A16 A15 A14 SA0 SA1 ...

Page 11

... Table 4. Am29F200B Autoselect Codes (High Voltage Method) Description Mode CE# Manufacturer ID: AMD L Device ID: Word L Am29F200B Byte L (Top Boot Block) Device ID: Word L Am29F200B Byte L (Bottom Boot Block) Sector Protection Verification Logic Low = Logic High = V IL Sector Protection/Unprotection The hardware sector protection feature disables both program and erase operations in any sector ...

Page 12

... The Command Definitions table shows the address and data requirements. This method is an alternative to that shown in the Autoselect Codes (High Voltage Am29F200B or WE initiate a write cycle ...

Page 13

... Embedded Erase algorithm are ignored. Note that a hardware reset during the chip erase operation imme- diately terminates the operation. The Chip Erase command sequence should be reinitiated once the device has returned to reading array data, to ensure data integrity. Am29F200B START Write Program Command Sequence Data Poll from System ...

Page 14

... DQ7 or DQ6 status bits, just as in the standard program oper- a tio n. See “Wr ite Operation S tatus ” for m ore information. The system may also write the autoselect command sequence when the device is in the Erase Suspend Am29F200B ...

Page 15

... Write Erase Command Sequence Data Poll from System No Data = FFh? Yes Erasure Completed Notes: 1. See the appropriate Command Definitions table for erase command sequence. 2. See “DQ3: Sector Erase Timer” for more information. Figure 3. Erase Operation Am29F200B Embedded Erase algorithm in progress 21526B-7 15 ...

Page 16

... Table 5. Am29F200B Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte Word Sector Protect Verify 4 (Note 9) Byte Word Program 4 Byte Word ...

Page 17

... During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously with DQ5. Figure 4. Data# Polling Algorithm Am29F200B Yes Yes PASS 21526B-8 17 ...

Page 18

... DQ5 went high. If the toggle bit is no longer toggling, the device has successfully completed the program or erase operation still toggling, the device did not complete the operation successfully, and Am29F200B ...

Page 19

... Complete, Write Reset Command Notes: 1. Read toggle bit twice to determine whether or not it is toggling. See text. 2. Recheck toggle bit because it may stop toggling as DQ5 changes to “1”. See text. Figure 5. Toggle Bit Algorithm Am29F200B (Note 1) No (Notes Program/Erase Operation Complete ...

Page 20

... DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. See “DQ5: Exceeded Timing Limits” for more information. 20 Table 1. Write Operation Status DQ7 DQ5 (Note 1) DQ6 (Note 2) DQ7# Toggle 0 0 Toggle toggle 0 Data Data Data DQ7# Toggle 0 Am29F200B DQ2 DQ3 (Note 1) RY/BY# N/A No toggle 0 1 Toggle 0 N/A Toggle 1 Data Data 1 N/A N/A 0 ...

Page 21

... Note: Operating ranges define those limits between which the functionality of the device is guaranteed +0.5 V 2.0 V 21526B-10 Figure 7. Maximum Positive Overshoot Am29F200B ) . . . . . . . . . . .0°C to +70° .–40°C to +85° .–55°C to +125° 21526B-11 Waveform 21 ...

Page 22

... Max 5 5.8 mA Min –2.5 mA Min CCmax Am29F200B Min Max Unit 1.0 µA 50 µA 1.0 µA Byte 40 mA Word 1 –0.5 0 11.5 12.5 V 0.45 V 2.4 V 3.2 4.2 V ...

Page 23

... 5.8 mA Min –2.5 mA Min 0. –100 µ Min CCmax C) . Am29F200B Min Typ Max Unit 1.0 µA 50 µA 1.0 µ µA –0 11.5 12 – 0.4 ...

Page 24

... Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels 21526B-12 INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Am29F200B -45, -50, All -55 others Unit 1 TTL gate L 30 100 0.0– ...

Page 25

... Test Setup Min CE Max OE OE Max IL Max Max Max Min Min Min t RC Addresses Stable t ACC OEH t CE HIGH Z Figure 9. Read Operations Timings Am29F200B Speed Options -45 -50 -55 -70 -90 -120 120 120 120 ...

Page 26

... RESET# RY/BY# CE#, OE# RESET# 26 Test Setup Max Max Min Min Min Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP Figure 10. RESET# Timings Am29F200B All Speed Options Unit 20 s 500 ns 500 21526B-13 ...

Page 27

... Address DQ15 Input Output t FHQV The falling edge of the last WE# signal t SET ( HOLD AH and t specifications Am29F200B Speed Options -55 -70 -90 -120 Unit 120 ns Data Output (DQ0–DQ7) Address Input Data Output ...

Page 28

... Min Min Min Min Min Min Min Min Min Min Byte Typ Word Typ Typ Min Min Min Am29F200B -70 -90 -120 Unit 70 90 120 ...

Page 29

... PA = program address program data Illustration shows device in word mode WPH A0h t BUSY is the true data at the program address. OUT Figure 13. Program Operation Timings Am29F200B Read Status Data (last two cycles WHWH1 D Status OUT t RB 21526B-16 29 ...

Page 30

... SA = sector address (for Sector Erase Valid Address for reading status data (”see “Write Operation Status”). 2. Illustration shows device in word mode. Figure 14. Chip/Sector Erase Operation Timings 555h for chip erase WPH 55h 30h 10 for Chip Erase Am29F200B Read Status Data WHWH2 In Complete Progress t t BUSY RB 21526B-17 ...

Page 31

... Figure 16. Toggle Bit Timings (During Embedded Algorithms Complement Complement Status Data Status Data Valid Status Valid Status (first read) (second read) Am29F200B VA High Z Valid Data True High Z True Valid Data 21526B- Valid Status Valid Data (stops toggling) 21526B-19 31 ...

Page 32

... Figure 18. Temporary Sector Unprotect Timing Diagram 32 Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 17. DQ2 vs. DQ6 Min Min Program or Erase Command Sequence t RSP Am29F200B Erase Resume Erase Erase Complete Read 21526B-20 All Speed Options 500 VIDR 21526B-21 ...

Page 33

... Speed Options -45 -50 -55 Min Min Min Min Min Min Min Min Min Min Min Byte Typ Word Typ Typ Am29F200B -70 -90 -120 Unit 70 90 120 ...

Page 34

... PA for program SA for sector erase 555 for chip erase Data# Polling GHEL t t WHWH1 CPH t BUSY for program PD for program 55 for erase 30 for sector erase 10 for chip erase Am29F200B PA DQ7# D OUT = Array Data. OUT 21526B-22 ...

Page 35

... CC = 5.0 V, one pin at a time. CC Test Setup Typ 8.5 OUT Test Conditions 150 C 125 C Am29F200B Unit Comments sec Excludes 00h programming prior to erasure (Note 4) sec µs Excludes system-level overhead µs (Note 5) sec , 1,000,000 cycles. Additionally, CC Min Max –1 1 – ...

Page 36

... PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package (measured in millimeters 1.27 NOM. TOP VIEW 28.00 28.40 2.17 2.45 0.35 0.50 SIDE VIEW 36 23 13.10 15.70 13.50 16.30 22 2.80 MAX. SEATING PLANE 0.10 0.35 Am29F200B 0.10 0.21 0° 0.60 8° 1.00 END VIEW 16-038-SO44-2 SO 044 DF83 8-8-96 lv ...

Page 37

... PHYSICAL DIMENSIONS TS 048—48-Pin Standard Thin Small Outline Package (measured in millimeters) Pin 1 I. 18.30 18.50 19.80 20.20 1.20 MAX 0.25MM (0.0098") BSC 48 11.90 12.10 25 0.08 0.20 0.10 0.21 0° 5° 0.50 0.70 Am29F200B 0.95 1.05 0.50 BSC 0.05 0.15 16-038-TS48-2 TS 048 DT95 8-8- ...

Page 38

... PHYSICAL DIMENSIONS TSR048—48-Pin Reverse Thin Small Outline Package (measured in millimeters) Pin 1 I. 18.30 18.50 19.80 20.20 1.20 MAX 0.25MM (0.0098") BSC 38 48 11.90 12.10 25 SEATING PLANE 0.08 0.20 0.10 0.21 0° 5° 0.50 0.70 Am29F200B 0.95 1.05 0.50 BSC 0.05 0.15 16-038-TS48 TSR048 DT95 8-8-96 lv ...

Page 39

... Figure 16. Toggle Bit Timings (During Embedded Algo- rithms) : Added text to note. Revision B+1 (April 12, 1999) Product Selector Guide The 55 ns option now has a V ±10%. Revision B+2 (July 2, 1999) specifi- CC ”. Global Added references to availability of device in Known Good Die (KGD) form. specifi- CC ”. Am29F200B operating range ...

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