AMD-K6 AMD [Advanced Micro Devices], AMD-K6 Datasheet - Page 186

• Manufacturer Part Number: AMD-K6
• Description: AMD-K6 Processor
• Manufacturer: AMD [Advanced Micro Devices]

AMD-K6
7.2
7.3
Output Signals
Registers
168
®
Processor Data Sheet
RESET Requirements
State of Processor After RESET
During the initial power-on reset of the processor, RESET must
remain asserted for a minimum of 1.0 ms after CLK and V
reach specification. (See “CLK Switching Characteristics” on
page 241 for clock specifications. See “Electrical Data” on page
233 for V
D u r i n g a wa r m re s e t w h i l e C L K a n d V
specification, RESET must remain asserted for a minimum of
15 clocks prior to its negation.
Table 25 show s the state of all processor outputs and
bidirectional signals immediately after RESET is sampled
asserted.
Table 25. Output Signal State After RESET
Table 26 on page 169 shows the state of all architecture
registers and Model-Specific Registers (MSRs) after the
processor has completed its initialization due to the recognition
of the assertion of RESET.
A[31:3], AP
ADS#, ADSC#
APCHK#
BE[7:0]#
BREQ
CACHE#
D/C#
D[63:0], DP[7:0]
FERR#
HIT#
HITM#
Power-on Configuration and Initialization
Signal
CC
Preliminary Information
specifications.)
Floating
Floating
Floating
State
High
High
High
High
High
High
Low
Low
HLDA
LOCK#
M/IO#
PCD
PCHK#
PWT
SCYC
SMIACT#
TDO
VCC2DET
W/R#
Signal
C C
20695H/0—March 1998
a re w i t h i n
Floating
State
High
High
High
Low
Low
Low
Low
Low
Low
Low
Chapter 7
CC