AMD-K6 AMD [Advanced Micro Devices], AMD-K6 Datasheet - Page 264

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AMD-K6

Manufacturer Part Number
AMD-K6
Description
AMD-K6 Processor
Manufacturer
AMD [Advanced Micro Devices]
Datasheet

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AMD-K6
16.6
Table 50. Input Setup and Hold Timings for 66-MHz Bus Operation
246
Notes:
Symbol
1. These level-sensitive signals can be asserted synchronously or asynchronously. To be sampled on a specific clock edge, setup and
2. These edge-sensitive signals can be asserted synchronously or asynchronously. To be sampled on a specific clock edge, setup and
t
t
t
t
t
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t
t
t
t
t
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t
t
t
t
t
t
t
t
t
t
t
t
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63
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51
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hold times must be met. If asserted asynchronously, they must be asserted for a minimum pulse width of two clocks.
hold times must be met. If asserted asynchronously, they must have been negated at least two clocks prior to assertion and must
remain asserted at least two clocks.
®
Processor Data Sheet
A[31:5] Setup Time
A[31:5] Hold Time
A20M# Setup Time
A20M# Hold Time
AHOLD Setup Time
AHOLD Hold Time
AP Setup Time
AP Hold Time
BOFF# Setup Time
BOFF# Hold Time
BRDY# Setup Time
BRDY# Hold Time
BRDYC# Setup Time
BRDYC# Hold Time
D[63:0] Read Data Setup Time
D[63:0] Read Data Hold Time
DP[7:0] Read Data Setup Time
DP[7:0] Read Data Hold Time
EADS# Setup Time
EADS# Hold Time
EWBE# Setup Time
EWBE# Hold Time
FLUSH# Setup Time
FLUSH# Hold Time
Input Setup and Hold Timings for 66-MHz Bus Operation
Parameter Description
Signal Switching Characteristics
Preliminary Information
6.0 ns
5.0 ns
5.5 ns
5.0 ns
5.5 ns
1.0 ns
5.0 ns
5.0 ns
2.8 ns
2.8 ns
5.0 ns
5.0 ns
1.0 ns
5.0 ns
1.0 ns
1.0 ns
1.0 ns
1.0 ns
1.0 ns
1.0 ns
1.5 ns
1.5 ns
1.0 ns
1.0 ns
Min
Preliminary Data
Max
Figure
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20695H/0—March 1998
Comments
Note 1
Note 1
Note 2
Note 2
Chapter 16

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