AMD-K6 AMD [Advanced Micro Devices], AMD-K6 Datasheet - Page 222

• Manufacturer Part Number: AMD-K6
• Description: AMD-K6 Processor
• Manufacturer: AMD [Advanced Micro Devices]

AMD-K6
11.2
204
®
Processor Data Sheet
Tri-State Test Mode
The Tri-State Test mode causes the processor to float its output
and bidirectional pins, which is useful for board-level
manufacturing testing. In this mode, the processor is
electrically isolated from other components on a system board,
allowing automated test equipment (ATE) to test components
that drive the same signals as those the processor floats.
If the FLUSH# signal is sampled Low during the falling
transition of RESET, the processor enters the Tri-State Test
mode. (See “FLUSH# (Cache Flush)” on page 97 for the
specific sampling requirements.) The signals floated in the
Tri-State Test mode are as follows:
The VCC2DET and TDO signals are the only outputs not
floated in the Tri-State Test mode. VCC2DET must remain Low
to ensure the system continues to supply the specified
processor core voltage to the V
because the Boundary-Scan Test Access Port must remain
enabled at all times, including during the Tri-State Test mode.
The Tri-State Test mode is exited when the processor samples
RESET asserted.
A[31:3]
ADS#
ADSC#
AP
APCHK#
BE[7:0]#
BREQ
CACHE#
Preliminary Information
Test and Debug
D/C#
D[63:0]
DP[7:0]
FERR#
HIT#
HITM#
HLDA
LOCK#
CC2
pins. TDO is never floated
M/IO#
PCD
PCHK#
PWT
SCYC
SMIACT#
W/R#
20695H/0—March 1998
Chapter 11