AMD-K6 AMD [Advanced Micro Devices], AMD-K6 Datasheet - Page 38
AMD-K6
Manufacturer Part Number
AMD-K6
Description
AMD-K6 Processor
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AMD-K6.pdf
(346 pages)
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AMD-K6
Return Address Stack
Branch Execution
Unit
20
®
Processor Data Sheet
The return address stack is a special device designed to
optimize CALL and RET pairs. Software is typically compiled
with subroutines that are frequently called from various places
in a program. This is usually done to save space. Entry into the
subroutine occurs with the execution of a CALL instruction. At
that time, the processor pushes the address of the next
instruction in memory following the CALL instruction onto the
stack (allocated space in memory). When the processor
encounters a RET instruction (within or at the end of the
subroutine), the branch logic pops the address from the stack
and begins fetching from that location. To avoid the latency of
main memory accesses during CALL and RET operations, the
return address stack caches the pushed addresses.
The branch execution unit enables efficient speculative
execution. This unit gives the processor the ability to execute
instructions beyond conditional branches before knowing
whether the branch prediction was correct. The AMD-K6
processor does not permanently update the x86 registers or
memory locations until all speculatively executed conditional
branch instructions are resolved. When a prediction is
incorrec t, the proc essor backs out to the point of the
mispredicted branch instruction and restores all registers. The
AMD-K6 can support up to seven outstanding branches.
Preliminary Information
Internal Architecture
20695H/0—March 1998
Chapter 2
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