zl50411 Zarlink Semiconductor, zl50411 Datasheet - Page 96

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zl50411

Manufacturer Part Number
zl50411
Description
Managed 9-port Fast Ethernet Switch With Private Vlan
Manufacturer
Zarlink Semiconductor
Datasheet

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Part Number:
zl50411GDG2
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12.3.6.8
I²C Address: h074; CPU Address: h0518
Accessed by CPU and I²C (R/W)
12.3.6.9
I²C Address: h075; CPU Address: h0519
Accessed by CPU and I²C (R/W)
Buffer reservation for class 1. Granularity 16 granules . (Default 0)
12.3.6.10
I²C Address: h076; CPU Address: h051A
Accessed by CPU and I²C (R/W)
Buffer reservation for class 2. Granularity 16 granules . (Default 0)
12.3.6.11
I²C Address: h077; CPU Address: h051B
Accessed by CPU and I²C (R/W)
Buffer reservation for class 3. Granularity 16 granules . (Default 0)
12.3.6.12
I²C Address: h056; CPU Address: h0530
Accessed by CPU and I²C (R/W)
Registers AVPML, AVPMM, and AVPMH allow the eight VLAN Tag priorities to map into eight Internal level transmit
priorities. Under the Internal transmit priority, seven is the highest priority where as zero is the lowest. This feature
allows the user the flexibility of redefining the VLAN priority field. For example, programming a value of 7 into bit 2:0
of the AVPML register would map packet VLAN priority 0 into Internal transmit priority 7. The new priority is used
inside the ZL50411. When the packet goes out it carries the original priority.
Bits [7:0]:
Bits [7:0]:
Bits [7:0]:
Bits [7:0]:
SFCB – Share FCB Size
C1RS – Class 1 Reserve Size
C3RS – Class 3 Reserve Size
C2RS – Class 2 Reserve Size
AVPML – VLAN Tag Priority Map
Expressed in multiples of 16 granules. Buffer reservation for shared pool.
Class 1 FCB Reservation
Class 2 FCB Reservation
Class 3 FCB Reservation
Zarlink Semiconductor Inc.
ZL50411
96
Data Sheet

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