zl50411 Zarlink Semiconductor, zl50411 Datasheet - Page 29

no-image

zl50411

Manufacturer Part Number
zl50411
Description
Managed 9-port Fast Ethernet Switch With Private Vlan
Manufacturer
Zarlink Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
zl50411GDG2
Manufacturer:
ZARLINK
Quantity:
20 000
Other available instructions for the ZL50411 include:
3.0
One extra port is dedicated to the CPU via the CPU interface module. Three modes this port can operate:
managed, lightly managed or unmanaged mode. The different between these modes is tx/rx Ethernet frame, tx/rx
control frame and receiving interrupt due to the lack of constant attention or processing power from the CPU.
The CPU interface utilizes a 8/16-bit bus in managed mode. It also supports a serial+MII, serial only, and an I
interface, which provides an easy and lower cost way to configure the system for reduced management.
Supported CPU interface modes are
1. 16-bit CPU interface similar to the Industry Standard Architecture (ISA) specification.
2. 8-bit CPU interface similar to ISA.
3. Serial with MII. A synchronous serial interface (SSI) bus is used for accessing the configuration register and
4. Lightly Managed Serial. Configuration registers access, Control frame and CPU transmit/receive packets are
5. Unmanaged Serial. The device can be configured by EEPROM using an I²C interface at bootup, or via a syn-
The CPU interface provides for easy and effective management of the switching system.
16-bit CPU
8-bit CPU
Serial with MII interface
Lightly Managed Serial
Unmanaged Serial
IDCODE – the IDCODE instruction causes the TDI and TDO to be connected to the IDCODE register.
HIGHZ – the HIGHZ instruction causes all of the logic outputs to be placed in an inactive drive state (e.g.,
high impedance).
control frame. MII is used for sending and receiving CPU packets.
sent through a synchronous serial interface (SSI) bus.
chronous serial interface (SSI) otherwise. All configuration registers and internal control blocks are accessible
by the interface. However, the CPU cannot receive or transmit frames nor will it receive any interrupt informa-
tion.
Management and Configuration
Operation Mode
Table 6 - Supported CPU interface modes
16-bit
8-bit
NA
NA
NA
ISA Interface
Zarlink Semiconductor Inc.
ZL50411
29
NA
NA
Yes
Yes
Yes
Serial
NA
NA
Yes
No
No
MII
NA
NA
No
No
Yes
Data Sheet
I²C
2
C

Related parts for zl50411