zl50411 Zarlink Semiconductor, zl50411 Datasheet - Page 122
zl50411
Manufacturer Part Number
zl50411
Description
Managed 9-port Fast Ethernet Switch With Private Vlan
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50411.pdf
(143 pages)
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12.3.10.16
CPU Address: h0EC0
Accessed by CPU (R/W)
If CPU wants to reset pools again, CPU has to clear bit 5 and then set bit 5.
Note : Before CPU doing so, CPU should set QCTRL (CPU Address EBA) bit 2 and bit 3 to one. After reset the
pools, CPU shall reprogram free granule link list (CPU address EC1, EC2, EC3, EC4, EC5, EC6). Then clear
QCTRL (EBA).
12.3.10.17
CPU address: h0EC1
Accessed by CPU (R/W)
CPU address: h0EC2
Accessed by CPU (R/W)
If CPU wants to write again, CPU has to clear bit 15 and then set bit 15.
Bits [3:0]
Bit [4]
Bit [5]
Bits [7:6]
Bits [7:0]
Bits [6:0]
Bit [7]
BUFF_RST
FCB_HEAD_PTR0, FCB_HEAD_PTR1
Fcb_head_ptr[14:8]. The head pointer of free granule link that CPU assigns.
Set 1 to write
Assign a value that the pool to be reset
0: port 0 pool
1: port 1 pool
2: port 2 pool
3: port 3 pool
4: port 4 pool
5: port 5 pool
6: port 6 pool
7: port 7 pool
8: port MMAC pool
9: shared pool
10: class 1 pool
11: class 2 pool
12: class 3 pool
13: multicast pool
14: cpu pool
15: reserved
If this bit is 1, then all the pools are assigned
Set 1 to reset the pools that are assigned
Reserved
Fcb_head_ptr[7:0]. The head pointer of free granule link that CPU assigns.
Zarlink Semiconductor Inc.
ZL50411
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