zl50411 Zarlink Semiconductor, zl50411 Datasheet - Page 114

• Manufacturer Part Number: zl50411
• Description: Managed 9-port Fast Ethernet Switch With Private Vlan
• Manufacturer: Zarlink Semiconductor

12.3.9.3
I²C Address: h06A+n; CPU Address: h0840+n (n = port number)
Accessed by CPU and I²C (R/W)
Expressed in multiples of 16 granules. (Default 0x6)
12.3.9.4
I²C Address: h073; CPU Address: h0848
Accessed by CPU and I²C (R/W)
Expressed in multiples of 16 granules. (Default 0x6)
12.3.9.5
I²C Address: h072; CPU Address: h0849
Accessed by CPU and I²C (R/W)
Expressed in multiples of 16 granules. (Default 0x24)
12.3.9.6
I²C Address: h0C2+n; CPU Address: h0860+n (n = port number)
Accessed by CPU and I²C (R/W)
Expressed in multiples of 16 granules. More than this number used on a source port will trigger either random drop
or flow control (Default 0x3)
12.3.9.7
I²C Address: h0CB; CPU Address: h0868
Accessed by CPU and I²C (R/W)
Expressed in multiples of 16 granules. More than this number used on a source port will trigger either random drop
or flow control (Default 0x3)
12.3.9.8
I²C Address: h0CA; CPU Address: h0869
Accessed by CPU and I²C (R/W)
Expressed in multiples of 16 granules. More than this number used on a source port will trigger either random drop
or flow control (Default 0x12)
Bits [7:4]:
PR100_n – Port 0~7 Reservation
PR100_CPU – Port CPU Reservation
PRM – Port MMAC Reservation
PTH100_n – Port 0~7 Threshold
PTH100_CPU – Port CPU Threshold
PTHG – Port MMAC Threshold
Broadcast Rate Control. Number of broadcast packets allowed within the time defined
in bits 6 to 4 of the Flooding Control Register (FCRn). (Default 0)
Zarlink Semiconductor Inc.
ZL50411
114
Data Sheet